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authorSergii Dmytruk <sergii.dmytruk@3mdeb.com>2021-08-21 16:24:02 +0300
committerFelix Held <felix-coreboot@felixheld.de>2022-02-11 20:18:05 +0000
commit3a96074441c4e2b28d6d6961b94fec5c4eada8ec (patch)
treeaa5d68b48b0032f538cd8fa18552ef9c4c245cd5 /src/mainboard
parentdba9b54731c000b26334bd31a7dbd0fa2dbe80aa (diff)
src/arch/ppc64/*: pass FDT address to payload
It's available in %r3 in bootblock and needs to be passed to payload in %r27. We use one of two hypervisor's special registers as a buffer, which aren't used for anything by the code. Change-Id: I0911f4b534c6f8cacfa057a5bad7576fec711637 Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57084 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com> Reviewed-by: Krystian Hebel <krystian.hebel@3mdeb.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/emulation/qemu-power9/Makefile.inc2
-rw-r--r--src/mainboard/emulation/qemu-power9/ramstage.c21
2 files changed, 23 insertions, 0 deletions
diff --git a/src/mainboard/emulation/qemu-power9/Makefile.inc b/src/mainboard/emulation/qemu-power9/Makefile.inc
index bd905a3029..ace00a75b7 100644
--- a/src/mainboard/emulation/qemu-power9/Makefile.inc
+++ b/src/mainboard/emulation/qemu-power9/Makefile.inc
@@ -2,3 +2,5 @@
romstage-y += cbmem.c
romstage-y += romstage.c
+
+ramstage-y += ramstage.c
diff --git a/src/mainboard/emulation/qemu-power9/ramstage.c b/src/mainboard/emulation/qemu-power9/ramstage.c
new file mode 100644
index 0000000000..c92587b696
--- /dev/null
+++ b/src/mainboard/emulation/qemu-power9/ramstage.c
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <cpu/power/spr.h>
+#include <program_loading.h>
+
+/*
+ * Payload's entry point is an offset to the real entry point, not to OPD
+ * (Official Procedure Descriptor) for entry point.
+ *
+ * Also pass FDT address to payload stored in SPR_HSPRG0 by bootblock.
+ */
+void platform_prog_run(struct prog *prog)
+{
+ asm volatile(
+ "mfspr %%r27, %0\n" /* pass pointer to FDT */
+ "mtctr %2\n"
+ "mr 3, %1\n"
+ "bctr\n"
+ :: "i"(SPR_HSPRG0), "r"(prog_entry_arg(prog)), "r"(prog_entry(prog))
+ : "memory");
+}