diff options
| author | Shon Wang <shon.wang@quanta.corp-partner.google.com> | 2022-06-28 16:58:10 +0800 |
|---|---|---|
| committer | Paul Fagerburg <pfagerburg@chromium.org> | 2022-07-29 15:00:26 +0000 |
| commit | 38777e5cc2a0de72c8524ae324cd2b4fd197d00a (patch) | |
| tree | 6dd28aba58babea749cbf420296fee182bbf0688 /src/mainboard | |
| parent | f333a442a3767a5b3ca35ca3b75278e3636d44e5 (diff) | |
mb/google/dedede/var/drawcia: Enable weida touchscreen
Add weida touchscreen support for drawcia.
BRANCH=dedede
TEST=Build and verify that touchscreen works on drawcia.
Change-Id: Ic76f3529771c6eeeafef7ca50fc400065aac2211
Signed-off-by: Shon Wang <shon.wang@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65471
Reviewed-by: Ivan Chen <yulunchen@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Henry Sun <henrysun@google.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/google/dedede/variants/drawcia/overridetree.cb | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/src/mainboard/google/dedede/variants/drawcia/overridetree.cb b/src/mainboard/google/dedede/variants/drawcia/overridetree.cb index 2b32e9b111..544678fa5f 100644 --- a/src/mainboard/google/dedede/variants/drawcia/overridetree.cb +++ b/src/mainboard/google/dedede/variants/drawcia/overridetree.cb @@ -284,6 +284,20 @@ chip soc/intel/jasperlake register "hid_desc_reg_offset" = "0x01" device i2c 15 on end end + chip drivers/i2c/hid + register "generic.hid" = ""WDHT0002"" + register "generic.desc" = ""WDT Touchscreen"" + register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_D4_IRQ)" + register "generic.probed" = "1" + register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D5)" + register "generic.reset_delay_ms" = "130" + register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D6)" + register "generic.enable_delay_ms" = "10" + register "generic.has_power_resource" = "1" + register "generic.disable_gpio_export_in_crs" = "1" + register "hid_desc_reg_offset" = "0x20" + device i2c 2c on end + end end # I2C 2 device pci 15.3 on chip drivers/intel/mipi_camera |