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authorSean Rhodes <sean@starlabs.systems>2023-05-25 12:19:42 +0100
committerMartin L Roth <gaumless@gmail.com>2023-06-03 20:35:58 +0000
commit3829b98aeb90fe6da258d1fc1ab9d960f65797f8 (patch)
tree1b109f275ebfdbc62aba5d84901002a02999df31 /src/mainboard
parent83a3b34178999dcdc730ba60cf650b07662fb483 (diff)
mb/starlabs/starbook: Fix the ramtop CMOS entry
The ramtop entry has to be 10 bytes long, and it was incorrectly set to 10 bits, instead of 10 bytes. Change this to 80. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I506f9d98a389dd859038fd270c5e344b65f514f8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/75420 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/starlabs/starbook/cmos.layout6
-rw-r--r--src/mainboard/starlabs/starbook/variants/tgl/cmos.layout6
2 files changed, 6 insertions, 6 deletions
diff --git a/src/mainboard/starlabs/starbook/cmos.layout b/src/mainboard/starlabs/starbook/cmos.layout
index d725d042d0..c15c6f8347 100644
--- a/src/mainboard/starlabs/starbook/cmos.layout
+++ b/src/mainboard/starlabs/starbook/cmos.layout
@@ -8,6 +8,9 @@ entries
0 120 r 0 reserved_memory
# -----------------------------------------------------------------
+# coreboot config options: ramtop
+304 80 h 0 ramtop
+
# RTC_BOOT_BYTE (coreboot hardcoded)
384 1 e 2 boot_option
388 4 h 0 reboot_counter
@@ -44,9 +47,6 @@ entries
# coreboot config options: check sums
984 16 h 0 check_sum
-# coreboot config options: ramtop
-1000 10 h 0 ramtop
-
# Bank: 2
# embedded controller settings (outside the checksummed area)
1024 8 h 1 fn_lock_state
diff --git a/src/mainboard/starlabs/starbook/variants/tgl/cmos.layout b/src/mainboard/starlabs/starbook/variants/tgl/cmos.layout
index 589359fa71..b5a2fb7891 100644
--- a/src/mainboard/starlabs/starbook/variants/tgl/cmos.layout
+++ b/src/mainboard/starlabs/starbook/variants/tgl/cmos.layout
@@ -8,6 +8,9 @@ entries
0 120 r 0 reserved_memory
# -----------------------------------------------------------------
+# coreboot config options: ramtop
+304 80 h 0 ramtop
+
# RTC_BOOT_BYTE (coreboot hardcoded)
384 1 e 2 boot_option
388 4 h 0 reboot_counter
@@ -44,9 +47,6 @@ entries
# coreboot config options: check sums
984 16 h 0 check_sum
-# coreboot config options: ramtop
-1000 10 h 0 ramtop
-
# Bank: 2
# embedded controller settings (outside the checksummed area)
1024 8 h 1 fn_lock_state