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authorStanley Wu <stanley1.wu@lcfc.corp-partner.google.com>2022-08-15 16:51:11 +0800
committerTim Wawrzynczak <twawrzynczak@chromium.org>2022-08-17 19:43:00 +0000
commit38155a1549a177145d5d4a52552d58d20db9d17c (patch)
treef162274cf3070b48d752161189b7b1963f361757 /src/mainboard
parente4a7ae5358b764803f4928a7a2f11a27a8673439 (diff)
mb/google/nissa/var/pujjo: Add FW_CONFIG probe for supported devices
Add FW_CONFIG probe based on pujjoteen boxster of below devices: LTE, SD card, stylus, WFC camera, AUDIO BUG=b:236158122 TEST=Boot to OS and verify that above devices are set based on fw_cofnig. Signed-off-by: Stanley Wu <stanley1.wu@lcfc.corp-partner.google.com> Change-Id: I49fc5461e7affba68a6b89bf166c84598fbfa088 Reviewed-on: https://review.coreboot.org/c/coreboot/+/66741 Reviewed-by: Kangheui Won <khwon@chromium.org> Reviewed-by: Reka Norman <rekanorman@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/brya/variants/pujjo/Makefile.inc1
-rw-r--r--src/mainboard/google/brya/variants/pujjo/fw_config.c51
-rw-r--r--src/mainboard/google/brya/variants/pujjo/overridetree.cb52
3 files changed, 97 insertions, 7 deletions
diff --git a/src/mainboard/google/brya/variants/pujjo/Makefile.inc b/src/mainboard/google/brya/variants/pujjo/Makefile.inc
index d38141ca24..8ae0e3b61c 100644
--- a/src/mainboard/google/brya/variants/pujjo/Makefile.inc
+++ b/src/mainboard/google/brya/variants/pujjo/Makefile.inc
@@ -3,4 +3,5 @@ bootblock-y += gpio.c
romstage-y += gpio.c
+ramstage-$(CONFIG_FW_CONFIG) += fw_config.c
ramstage-y += gpio.c
diff --git a/src/mainboard/google/brya/variants/pujjo/fw_config.c b/src/mainboard/google/brya/variants/pujjo/fw_config.c
new file mode 100644
index 0000000000..625cd97cd3
--- /dev/null
+++ b/src/mainboard/google/brya/variants/pujjo/fw_config.c
@@ -0,0 +1,51 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <baseboard/gpio.h>
+#include <baseboard/variants.h>
+#include <console/console.h>
+#include <fw_config.h>
+
+static const struct pad_config lte_enable_pads[] = {
+ /* A8 : WWAN_RF_DISABLE_ODL */
+ PAD_CFG_GPO(GPP_A8, 1, DEEP),
+ /* H19 : SOC_I2C_SUB_INT_ODL */
+ PAD_CFG_GPI_APIC(GPP_H19, NONE, PLTRST, LEVEL, NONE),
+ /* H23 : WWAN_SAR_DETECT_ODL */
+ PAD_CFG_GPO(GPP_H23, 1, DEEP),
+};
+
+static const struct pad_config lte_disable_pads[] = {
+ /* D6 : WWAN_EN */
+ PAD_NC(GPP_D6, NONE),
+ /* F12 : WWAN_RST_L */
+ PAD_NC_LOCK(GPP_F12, NONE, LOCK_CONFIG),
+};
+
+static const struct pad_config sd_disable_pads[] = {
+ /* D8 : SD_CLKREQ_ODL */
+ PAD_NC(GPP_D8, NONE),
+ /* H12 : SD_PERST_L */
+ PAD_NC_LOCK(GPP_H12, NONE, LOCK_CONFIG),
+ /* H13 : EN_PP3300_SD_X */
+ PAD_NC_LOCK(GPP_H13, NONE, LOCK_CONFIG),
+};
+
+void fw_config_gpio_padbased_override(struct pad_config *padbased_table)
+{
+ if (fw_config_probe(FW_CONFIG(LTE, LTE_PRESENT))) {
+ printk(BIOS_INFO, "Enable LTE-related GPIO pins.\n");
+ gpio_padbased_override(padbased_table, lte_enable_pads,
+ ARRAY_SIZE(lte_enable_pads));
+ } else {
+ printk(BIOS_INFO, "Disable LTE-related GPIO pins.\n");
+ gpio_padbased_override(padbased_table, lte_disable_pads,
+ ARRAY_SIZE(lte_disable_pads));
+ }
+
+ if (fw_config_probe(FW_CONFIG(SD_CARD, SD_ABSENT))) {
+ printk(BIOS_INFO, "Disable SD card GPIO pins.\n");
+ gpio_padbased_override(padbased_table, sd_disable_pads,
+ ARRAY_SIZE(sd_disable_pads));
+ }
+
+}
diff --git a/src/mainboard/google/brya/variants/pujjo/overridetree.cb b/src/mainboard/google/brya/variants/pujjo/overridetree.cb
index 8794d2de06..5e0e9fabb2 100644
--- a/src/mainboard/google/brya/variants/pujjo/overridetree.cb
+++ b/src/mainboard/google/brya/variants/pujjo/overridetree.cb
@@ -1,3 +1,26 @@
+fw_config
+ field LTE 6
+ option LTE_ABSENT 0
+ option LTE_PRESENT 1
+ end
+ field SD_CARD 7
+ option SD_ABSENT 0
+ option SD_PRESENT 1
+ end
+ field STYLUS 8
+ option STYLUS_ABSENT 0
+ option STYLUS_PRESENT 1
+ end
+ field WFC 9
+ option WFC_ABSENT 0
+ option WFC_PRESENT 1
+ end
+ field AUDIO 12 14
+ option ALC1019_ALC5682IVS 0
+ end
+
+end
+
chip soc/intel/alderlake
register "sagv" = "SaGv_Enabled"
@@ -140,7 +163,9 @@ chip soc/intel/alderlake
register "key.linux_code" = "SW_PEN_INSERTED"
register "key.linux_input_type" = "EV_SW"
register "key.label" = ""pen_eject""
- device generic 0 on end
+ device generic 0 on
+ probe STYLUS STYLUS_PRESENT
+ end
end
end
device ref i2c2 on
@@ -190,7 +215,9 @@ chip soc/intel/alderlake
register "reg_adv_ctrl18" = "0x33"
register "reg_adv_ctrl19" = "0xf0"
register "reg_adv_ctrl20" = "0xf0"
- device i2c 28 on end
+ device i2c 28 on
+ probe LTE LTE_PRESENT
+ end
end
end
device ref i2c3 on
@@ -204,12 +231,16 @@ chip soc/intel/alderlake
register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
register "property_list[0].name" = ""realtek,jd-src""
register "property_list[0].integer" = "1"
- device i2c 1a on end
+ device i2c 1a on
+ probe AUDIO ALC1019_ALC5682IVS
+ end
end
chip drivers/generic/alc1015
register "hid" = ""RTL1019""
register "sdb" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)"
- device generic 0 on end
+ device generic 0 on
+ probe AUDIO ALC1019_ALC5682IVS
+ end
end
end
device ref i2c5 on
@@ -256,6 +287,7 @@ chip soc/intel/alderlake
register "srcclk_pin" = "3"
device generic 0 on end
end
+ probe SD_CARD SD_PRESENT
end
device ref pch_espi on
chip ec/google/chromeec
@@ -300,7 +332,9 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB2 WWAN""
register "type" = "UPC_TYPE_INTERNAL"
- device ref usb2_port2 on end
+ device ref usb2_port2 on
+ probe LTE LTE_PRESENT
+ end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-A Port A0 (MLB)""
@@ -324,7 +358,9 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB2 WFC""
register "type" = "UPC_TYPE_INTERNAL"
- device ref usb2_port7 on end
+ device ref usb2_port7 on
+ probe WFC WFC_PRESENT
+ end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Bluetooth""
@@ -357,7 +393,9 @@ chip soc/intel/alderlake
chip drivers/usb/acpi
register "desc" = ""USB3 WWAN""
register "type" = "UPC_TYPE_INTERNAL"
- device ref usb3_port3 on end
+ device ref usb3_port3 on
+ probe LTE LTE_PRESENT
+ end
end
end
end