diff options
| author | Wisley Chen <wisley.chen@quanta.corp-partner.google.com> | 2022-04-15 13:39:23 +0600 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-04-20 09:37:15 +0000 |
| commit | 35a124ec77953820b1d2cd49d88451d0d0179035 (patch) | |
| tree | b8a07912cf2f393bffbdd90d7c8c8066d9b21c04 /src/mainboard | |
| parent | d80d88c0fec96b2fff93db87d0c83f4c6754ae7a (diff) | |
mb/google/brya/var/anahera{4es}: Enable power saving for Smart Card
Configure the power saving pin for Smart Card.
BUG=b:229356121
TEST=emerge-brya coreboot chromeos-bootimage
Change-Id: Ia17970f717c6ba806d9603031c486bad86e42b37
Signed-off-by: Wisley Chen <wisley.chen@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63648
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/google/brya/variants/anahera/gpio.c | 2 | ||||
| -rw-r--r-- | src/mainboard/google/brya/variants/anahera4es/gpio.c | 2 |
2 files changed, 4 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/anahera/gpio.c b/src/mainboard/google/brya/variants/anahera/gpio.c index 9483d564ab..02ebeb8ee3 100644 --- a/src/mainboard/google/brya/variants/anahera/gpio.c +++ b/src/mainboard/google/brya/variants/anahera/gpio.c @@ -61,6 +61,8 @@ static const struct pad_config override_gpio_table[] = { PAD_CFG_GPO(GPP_E16, 1, DEEP), /* E20 : USB_C1_LSX_SOC_TX ==> EN_PP3300_eMMC */ PAD_CFG_GPO(GPP_E20, 1, DEEP), + /* E22 : DDPA_CTRLCLK ==> SC_PWR_SV */ + PAD_CFG_GPO(GPP_E22, 1, DEEP), /* E23 : DDPA_CTRLDATA ==> NC */ PAD_NC(GPP_E23, NONE), diff --git a/src/mainboard/google/brya/variants/anahera4es/gpio.c b/src/mainboard/google/brya/variants/anahera4es/gpio.c index 132dbf64b2..12f73fc014 100644 --- a/src/mainboard/google/brya/variants/anahera4es/gpio.c +++ b/src/mainboard/google/brya/variants/anahera4es/gpio.c @@ -65,6 +65,8 @@ static const struct pad_config override_gpio_table[] = { PAD_CFG_GPO(GPP_E16, 1, DEEP), /* E20 : USB_C1_LSX_SOC_TX ==> EN_PP3300_eMMC */ PAD_CFG_GPO(GPP_E20, 1, DEEP), + /* E22 : DDPA_CTRLCLK ==> SC_PWR_SV */ + PAD_CFG_GPO(GPP_E22, 1, DEEP), /* E23 : DDPA_CTRLDATA ==> NC */ PAD_NC(GPP_E23, NONE), |