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authorFelix Held <felix-coreboot@felixheld.de>2022-03-02 15:21:24 +0100
committerFelix Held <felix-coreboot@felixheld.de>2022-03-03 18:34:15 +0000
commit114d650fced9ef632aadde90bd7c8e7d1214426a (patch)
treef2aa891343266f99426acbebf029ab777e8a6c1f /src/mainboard
parent91d006c003781dcd83e82fe7c992174a93d6c4c5 (diff)
soc/amd/stoneyridge/acpi: rename cpu.asl to pnot.asl
After the patch that moved the generation of the PPKG object to Stoneyridge's acpi.c, only the PNOT object remained in its cpu.asl, so rename it to pnot.asl. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I0deb2d75cae98b8fcd31297d7fac5f27525efe65 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62540 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/amd/gardenia/dsdt.asl4
-rw-r--r--src/mainboard/amd/padmelon/dsdt.asl4
-rw-r--r--src/mainboard/google/kahlee/dsdt.asl4
3 files changed, 6 insertions, 6 deletions
diff --git a/src/mainboard/amd/gardenia/dsdt.asl b/src/mainboard/amd/gardenia/dsdt.asl
index 6c275a0632..3759384db6 100644
--- a/src/mainboard/amd/gardenia/dsdt.asl
+++ b/src/mainboard/amd/gardenia/dsdt.asl
@@ -24,8 +24,8 @@ DefinitionBlock (
/* PCI IRQ mapping for the Southbridge */
#include <pcie.asl>
- /* Describe the processor tree (\_SB) */
- #include <cpu.asl>
+ /* Power state notification */
+ #include <pnot.asl>
/* Contains the supported sleep states for this chipset */
#include <soc/amd/common/acpi/sleepstates.asl>
diff --git a/src/mainboard/amd/padmelon/dsdt.asl b/src/mainboard/amd/padmelon/dsdt.asl
index 026acf4869..610459713f 100644
--- a/src/mainboard/amd/padmelon/dsdt.asl
+++ b/src/mainboard/amd/padmelon/dsdt.asl
@@ -22,8 +22,8 @@ DefinitionBlock (
/* PCI IRQ mapping for the Southbridge */
#include <pcie.asl>
- /* Describe the processor tree (\_SB) */
- #include <cpu.asl>
+ /* Power state notification */
+ #include <pnot.asl>
/* Contains the supported sleep states for this chipset */
#include <soc/amd/common/acpi/sleepstates.asl>
diff --git a/src/mainboard/google/kahlee/dsdt.asl b/src/mainboard/google/kahlee/dsdt.asl
index 4820306647..be4033b270 100644
--- a/src/mainboard/google/kahlee/dsdt.asl
+++ b/src/mainboard/google/kahlee/dsdt.asl
@@ -24,8 +24,8 @@ DefinitionBlock (
/* PCI IRQ mapping for the Southbridge */
#include <pcie.asl>
- /* Describe the processor tree (\_SB) */
- #include <cpu.asl>
+ /* Power state notification */
+ #include <pnot.asl>
/* Contains the supported sleep states for this chipset */
#include <soc/amd/common/acpi/sleepstates.asl>