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authorArthur Heymans <arthur@aheymans.xyz>2017-08-29 08:30:43 +0200
committerMartin Roth <martinroth@google.com>2017-09-22 13:09:10 +0000
commitfd440bb79eedf36fdd27d26801146a2ecb5218a3 (patch)
tree9acacf8f3dac687fb915ad2830bd086b46df03a2 /src/mainboard
parent1dce59044795613d957ad59d7faac41ff46ea754 (diff)
mb/asrock/g41c-gs: Fix the SATA clock output on ck505
With reset default of the clockgen on this board the SATA clock which needs to be 100MHz depends on FSB BSEL straps. This explains why SATA was originally tested to be working but fails with CPUs operating at different FSB. This change sets a bit in the clockgen configuration which fixes the SATA clock. TESTED on with a 1333MHz FSB CPU. Change-Id: Ic2b8ca91920f015ae3265871bc092023302fefdc Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/21257 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/asrock/g41c-gs/Kconfig1
-rw-r--r--src/mainboard/asrock/g41c-gs/devicetree.cb6
2 files changed, 7 insertions, 0 deletions
diff --git a/src/mainboard/asrock/g41c-gs/Kconfig b/src/mainboard/asrock/g41c-gs/Kconfig
index 62cd7e9dfe..e65f4eef6b 100644
--- a/src/mainboard/asrock/g41c-gs/Kconfig
+++ b/src/mainboard/asrock/g41c-gs/Kconfig
@@ -33,6 +33,7 @@ config BOARD_SPECIFIC_OPTIONS
select HAVE_OPTION_TABLE
select HAVE_CMOS_DEFAULT
select HAVE_ACPI_RESUME
+ select DRIVERS_I2C_CK505
config MAINBOARD_DIR
string
diff --git a/src/mainboard/asrock/g41c-gs/devicetree.cb b/src/mainboard/asrock/g41c-gs/devicetree.cb
index fd7f271339..f58fae749c 100644
--- a/src/mainboard/asrock/g41c-gs/devicetree.cb
+++ b/src/mainboard/asrock/g41c-gs/devicetree.cb
@@ -140,6 +140,12 @@ chip northbridge/intel/x4x # Northbridge
end
device pci 1f.3 on # SMbus
subsystemid 0x1849 0x27da
+ chip drivers/i2c/ck505 # W83115RG-965
+ # set SATA to fixed 100Mhz refclk
+ register "mask" = "{ 0x02 }"
+ register "regs" = "{ 0x02 }"
+ device i2c 69 on end
+ end
end
device pci 1f.4 off end
device pci 1f.5 off end