diff options
author | Jonathan A. Kollasch <jakllsch@kollasch.net> | 2013-10-15 16:45:51 -0500 |
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committer | Jonathan A. Kollasch <jakllsch@kollasch.net> | 2013-10-19 16:10:56 +0200 |
commit | 553fe1cbc72c849504041fb65dbbb1afacd3914b (patch) | |
tree | 368f0daad3b7114fdf9c27090b6f9901f054e784 /src/mainboard/winent/mb6047/get_bus_conf.c | |
parent | e1ffd9ef7a04b5a3d167b0767afce08a04721fe8 (diff) |
winent-mb6047: initial WIN Enterprises MB-60470 board port
What works:
- ACPI interrupt routing for onboard devices
- onboard devices including USBs, ATAs, NICs, COM1
What almost works:
- SMI720 VGA BIOS needs forthcoming VGA BIOS hooks in SeaBIOS to work
Untested:
- Interrupt Line Register interrupt routing
- PIRQ interrupt routing
- MPBIOS/MPTABLE interrupt routing
- unpopulated on board revision 1A AC97 audio
- unpopulated PCI-E x16 slot
- unpopulated ExpressCard slot
- HT expansion board
Thanks to WIN Enterprises for providing boards.
Change-Id: I7787f89b3ab454b668c3b75d0d1cde55b8d53c48
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Reviewed-on: http://review.coreboot.org/3975
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard/winent/mb6047/get_bus_conf.c')
-rw-r--r-- | src/mainboard/winent/mb6047/get_bus_conf.c | 67 |
1 files changed, 1 insertions, 66 deletions
diff --git a/src/mainboard/winent/mb6047/get_bus_conf.c b/src/mainboard/winent/mb6047/get_bus_conf.c index e94c608cc7..5b96b05f25 100644 --- a/src/mainboard/winent/mb6047/get_bus_conf.c +++ b/src/mainboard/winent/mb6047/get_bus_conf.c @@ -3,9 +3,7 @@ #include <device/pci_ids.h> #include <string.h> #include <stdint.h> -#if CONFIG_LOGICAL_CPUS #include <cpu/amd/multicore.h> -#endif #include <cpu/amd/amdk8_sysconf.h> #include <stdlib.h> @@ -18,40 +16,17 @@ unsigned char bus_ck804_2; //3 unsigned char bus_ck804_3; //4 unsigned char bus_ck804_4; //5 unsigned char bus_ck804_5; //6 -unsigned char bus_8131_0; //7 -unsigned char bus_8131_1; //8 -unsigned char bus_8131_2; //9 -unsigned char bus_coproc_0; unsigned apicid_ck804; -unsigned apicid_8131_1; -unsigned apicid_8131_2; unsigned pci1234x[] = { //Here you only need to set value in pci1234 for HT-IO that could be installed or not //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail 0x0000000, - 0x0000200, - 0x0000100, -// 0x0000ff0, -// 0x0000ff0, -// 0x0000ff0, -// 0x0000ff0, -// 0x0000ff0 }; unsigned hcdnx[] = { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most 0x20202020, - 0x20202020, - 0x20202020, -// 0x20202020, -// 0x20202020, -// 0x20202020, -// 0x20202020, -// 0x20202020, }; -unsigned sbdn3; -unsigned coprocdn; - static unsigned get_bus_conf_done = 0; void get_bus_conf(void) @@ -79,8 +54,6 @@ void get_bus_conf(void) sysconf.sbdn = (sysconf.hcdn[0] & 0xff); // first byte of first chain sbdn = sysconf.sbdn; - sbdn3 = (sysconf.hcdn[1] & 0xff); // first byte of second chain - bus_ck804_0 = (sysconf.pci1234[0] >> 16) & 0xff; /* CK804 */ @@ -120,45 +93,7 @@ void get_bus_conf(void) sbdn + 0x0e); } - bus_8131_0 = (sysconf.pci1234[1] >> 16) & 0xff; - /* 8131-1 */ - dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3, 0)); - if (dev) { - bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS); - bus_8131_2 = pci_read_config8(dev, PCI_SUBORDINATE_BUS); - bus_8131_2++; - } else { - printk(BIOS_DEBUG, - "ERROR - could not find PCI %02x:01.0, using defaults\n", - bus_8131_0); - - bus_8131_1 = bus_8131_0 + 1; - bus_8131_2 = bus_8131_0 + 2; - } - /* 8131-2 */ - dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3 + 1, 0)); - if (dev) { - bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS); - } else { - printk(BIOS_DEBUG, - "ERROR - could not find PCI %02x:02.0, using defaults\n", - bus_8131_0); - - bus_8131_2 = bus_8131_1 + 1; - } - - if (sysconf.pci1234[2] & 1) { - bus_coproc_0 = (sysconf.pci1234[2] >> 16) & 0xff; - coprocdn = (sysconf.hcdn[2] & 0xff); - } - /*I/O APICs: APIC ID Version State Address*/ -#if CONFIG_LOGICAL_CPUS - apicid_base = get_apicid_base(3); -#else - apicid_base = CONFIG_MAX_PHYSICAL_CPUS; -#endif + apicid_base = get_apicid_base(1); apicid_ck804 = apicid_base + 0; - apicid_8131_1 = apicid_base + 1; - apicid_8131_2 = apicid_base + 2; } |