diff options
author | Jonathan A. Kollasch <jakllsch@kollasch.net> | 2013-10-15 16:45:51 -0500 |
---|---|---|
committer | Jonathan A. Kollasch <jakllsch@kollasch.net> | 2013-10-19 16:10:56 +0200 |
commit | 553fe1cbc72c849504041fb65dbbb1afacd3914b (patch) | |
tree | 368f0daad3b7114fdf9c27090b6f9901f054e784 /src/mainboard/winent/mb6047/devicetree.cb | |
parent | e1ffd9ef7a04b5a3d167b0767afce08a04721fe8 (diff) |
winent-mb6047: initial WIN Enterprises MB-60470 board port
What works:
- ACPI interrupt routing for onboard devices
- onboard devices including USBs, ATAs, NICs, COM1
What almost works:
- SMI720 VGA BIOS needs forthcoming VGA BIOS hooks in SeaBIOS to work
Untested:
- Interrupt Line Register interrupt routing
- PIRQ interrupt routing
- MPBIOS/MPTABLE interrupt routing
- unpopulated on board revision 1A AC97 audio
- unpopulated PCI-E x16 slot
- unpopulated ExpressCard slot
- HT expansion board
Thanks to WIN Enterprises for providing boards.
Change-Id: I7787f89b3ab454b668c3b75d0d1cde55b8d53c48
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Reviewed-on: http://review.coreboot.org/3975
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard/winent/mb6047/devicetree.cb')
-rw-r--r-- | src/mainboard/winent/mb6047/devicetree.cb | 45 |
1 files changed, 14 insertions, 31 deletions
diff --git a/src/mainboard/winent/mb6047/devicetree.cb b/src/mainboard/winent/mb6047/devicetree.cb index 3d8c65e73a..09a062ec91 100644 --- a/src/mainboard/winent/mb6047/devicetree.cb +++ b/src/mainboard/winent/mb6047/devicetree.cb @@ -5,13 +5,13 @@ chip northbridge/amd/amdk8/root_complex # Root complex end end device domain 0 on # PCI domain - subsystemid 0x10f1 0x2891 inherit + subsystemid 0x10de 0xcb84 inherit chip northbridge/amd/amdk8 # Northbridge / RAM controller device pci 18.0 on # Link 0 == LDT 0 chip southbridge/nvidia/ck804 # Southbridge device pci 0.0 on end # HT device pci 1.0 on # LPC - chip superio/winbond/w83627hf # Super I/O + chip superio/winbond/w83627thg # Super I/O device pnp 2e.0 off # Floppy io 0x60 = 0x3f0 irq 0x70 = 6 @@ -25,7 +25,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex io 0x60 = 0x3f8 irq 0x70 = 4 end - device pnp 2e.3 off # Com2 + device pnp 2e.3 on # Com2 io 0x60 = 0x2f8 irq 0x70 = 3 end @@ -35,20 +35,14 @@ chip northbridge/amd/amdk8/root_complex # Root complex irq 0x70 = 1 irq 0x72 = 12 end - device pnp 2e.6 off # Consumer IR - io 0x60 = 0x100 - end - device pnp 2e.7 off # Game port, MIDI, GPIO1 - io 0x60 = 0x220 - io 0x62 = 0x300 - irq 0x70 = 9 - end + device pnp 2e.6 off end # Consumer IR + device pnp 2e.7 off end # Game port, MIDI, GPIO1 device pnp 2e.8 off end # GPIO2 device pnp 2e.9 off end # GPIO3 device pnp 2e.a off end # ACPI - device pnp 2e.b off # Hardware monitor + device pnp 2e.b on # Hardware monitor io 0x60 = 0x290 - irq 0x70 = 5 + irq 0x70 = 0 end end end @@ -97,38 +91,27 @@ chip northbridge/amd/amdk8/root_complex # Root complex # end device pci 2.0 on end # USB 1.1 device pci 2.1 on end # USB 2 - device pci 4.0 off end # ACI + device pci 4.0 on end # ACI device pci 4.1 off end # MCI device pci 6.0 on end # IDE device pci 7.0 on end # SATA 1 device pci 8.0 on end # SATA 0 device pci 9.0 on # PCI - # chip drivers/ati/ragexl - device pci 7.0 on end + # device pci 6.0 on end end - device pci a.0 off end # NIC - device pci b.0 off end # PCI E 3 - device pci c.0 off end # PCI E 2 + device pci a.0 on end # NIC + device pci b.0 on end # PCI E 3 + device pci c.0 on end # PCI E 2 device pci d.0 on end # PCI E 1 device pci e.0 on end # PCI E 0 register "ide0_enable" = "1" - register "ide1_enable" = "1" + register "ide1_enable" = "0" register "sata0_enable" = "1" register "sata1_enable" = "1" end end device pci 18.0 on end # Link 1 - device pci 18.0 on # Link 2 == LDT 2 - chip southbridge/amd/amd8131 # Southbridge - device pci 0.0 on end - device pci 0.1 on end - device pci 1.0 on - device pci 9.0 on end - device pci 9.1 on end - end - device pci 1.1 on end - end - end + device pci 18.0 on end # Link 2 == LDT 2 device pci 18.1 on end device pci 18.2 on end device pci 18.3 on end |