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authorDuncan Laurie <dlaurie@chromium.org>2013-05-24 11:06:49 -0700
committerStefan Reinauer <stefan.reinauer@coreboot.org>2013-11-25 23:38:36 +0100
commitc593999a0ad9b9f19c8171f6229faa191d055491 (patch)
tree0759809b866a346d98870803a6ad5aceb4905149 /src/mainboard/via
parent7820c77f2c118d604d0acfce8deb40536cae3121 (diff)
lynxpoint: Enable extra 16 IOAPIC entries for GPIO PIRQ
LynxPoint-LP has an additional 16 entries in the IOAPIC that can be assigned to specific GPIOs when they are configured as PIRQ. The maximum redirection entries field in the IOAPIC needs to be set to 0x27 when this is enabled. Additionally specific GPIOs need to be routed to PIRQ so they interrupt via the IOAPIC instead of the GPIO IRQ 14/15. Change-Id: Ie587e1d203422ff6fb7fc5056d20a5ae66720991 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/56620 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/4203 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
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