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authorYinghai Lu <yinghailu@gmail.com>2004-10-27 02:12:22 +0000
committerYinghai Lu <yinghailu@gmail.com>2004-10-27 02:12:22 +0000
commit20fc678d65b4cdf6b24bdff45ef04933c538e2e8 (patch)
tree8bcf35d3f542cfbcac153bd25ec6c7a942f1481a /src/mainboard/tyan/s2885
parent63f2f721b4c421ba0ad42e6469664eeed126913f (diff)
spare 4s for restart
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1721 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/tyan/s2885')
-rw-r--r--src/mainboard/tyan/s2885/auto.c17
1 files changed, 15 insertions, 2 deletions
diff --git a/src/mainboard/tyan/s2885/auto.c b/src/mainboard/tyan/s2885/auto.c
index 333aa90c29..dd17dfdf70 100644
--- a/src/mainboard/tyan/s2885/auto.c
+++ b/src/mainboard/tyan/s2885/auto.c
@@ -42,10 +42,16 @@ static void soft_reset(void)
set_bios_reset();
pci_write_config8(PCI_DEV(0, 0x04, 0), 0x47, 1);
}
+
+#define AMD8111_RESET PCI_DEV( \
+ HARD_RESET_BUS, \
+ HARD_RESET_DEVICE, \
+ HARD_RESET_FUNCTION)
+
static void soft2_reset(void)
{
set_bios_reset();
- pci_write_config8(PCI_DEV(3, 0x04, 0), 0x47, 1);
+ pci_write_config8(AMD8111_RESET, 0x47, 1);
}
static void memreset_setup(void)
@@ -139,7 +145,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
return smbus_read_byte(device, address);
}
-//#include "northbridge/amd/amdk8/setup_resource_map.c"
+#include "northbridge/amd/amdk8/setup_resource_map.c"
#include "northbridge/amd/amdk8/raminit.c"
#include "northbridge/amd/amdk8/coherent_ht.c"
#include "sdram/generic_sdram.c"
@@ -204,6 +210,13 @@ static void main(unsigned long bist)
#else
/* cpu reset also reset the memtroller ????
need soft_reset to reset all except keep HT link freq and width */
+ /* So we don't need to
+ 1. jmp to __cpu_reset
+ 2. jmp to __main to copy ROM to ram (It costs some time)
+ 3. call hardwaremain(), it will according to boot_complete to issue hard_reset in southbridge.
+ (Actually it is soft2_reset(); --- without call hard_reset, the memory is corrupted.
+ We will call soft2_reset directly to spare time in 1 and 2 and 3.2
+ */
distinguish_cpu_resets();
soft2_reset();
#endif