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authorRonald G. Minnich <rminnich@gmail.com>2003-08-27 14:33:13 +0000
committerRonald G. Minnich <rminnich@gmail.com>2003-08-27 14:33:13 +0000
commitfa2df758f226f5b06537c6e6f8e27072b94644c5 (patch)
treec5cb52825577c8d3825121283e020ad44a3fccd8 /src/mainboard/tyan/s2880
parentbee6575d7cdc065be6f8b83f9217602e44f29c20 (diff)
support for new mobos and fixes
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1087 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/tyan/s2880')
-rw-r--r--src/mainboard/tyan/s2880/Config.lb27
-rw-r--r--src/mainboard/tyan/s2880/auto.c10
-rw-r--r--src/mainboard/tyan/s2880/chip.h1
-rw-r--r--src/mainboard/tyan/s2880/mainboard.c144
4 files changed, 105 insertions, 77 deletions
diff --git a/src/mainboard/tyan/s2880/Config.lb b/src/mainboard/tyan/s2880/Config.lb
index 3367cd552a..865a07d122 100644
--- a/src/mainboard/tyan/s2880/Config.lb
+++ b/src/mainboard/tyan/s2880/Config.lb
@@ -17,12 +17,15 @@ uses ARCH
###
##object mainboard.o
config chip.h
-register "fixup_scsi" = "1"
+register "fixup_scsi" = "1"
+register "fixup_vga" = "1"
+
driver mainboard.o
driver lsi_scsi.o
-driver adaptec_scsi.o
-driver intel_nic.o
+#driver adaptec_scsi.o
+driver promise_sata.o
+#driver intel_nic.o
object static_devices.o
if HAVE_MP_TABLE object mptable.o end
if HAVE_PIRQ_TABLE object irq_tables.o end
@@ -45,7 +48,7 @@ if USE_FALLBACK_IMAGE
mainboardinit cpu/i386/reset16.inc
ldscript /cpu/i386/reset16.lds
else
- print "NO FALLBACK USED!"
+# print "NO FALLBACK USED!"
end
if USE_NORMAL_IMAGE
@@ -152,9 +155,9 @@ mainboardinit cpu/k8/disable_mmx_sse.inc
###
northbridge amd/amdk8
end
-southbridge amd/amd8111
+southbridge amd/amd8111 "amd8111"
end
-southbridge amd/amd8131
+southbridge amd/amd8131 "amd8131"
end
#mainboardinit archi386/smp/secondary.inc
#superio NSC/pc87360
@@ -163,7 +166,11 @@ end
#end
dir /pc80
##dir /src/superio/winbond/w83627hf
-cpu p5 end
-cpu p6 end
-cpu k7 end
-cpu k8 end
+dir /bioscall
+dir /cpu/k8
+cpu k8 "cpu0"
+ register "up" = "{.chip = &amd8131, .ht_width=8, .ht_speed=200}"
+end
+
+cpu k8 "cpu1"
+end
diff --git a/src/mainboard/tyan/s2880/auto.c b/src/mainboard/tyan/s2880/auto.c
index 5dd6c673a0..5386b10d97 100644
--- a/src/mainboard/tyan/s2880/auto.c
+++ b/src/mainboard/tyan/s2880/auto.c
@@ -14,21 +14,21 @@
#include "lib/delay.c"
#include "cpu/p6/boot_cpu.c"
#include "northbridge/amd/amdk8/reset_test.c"
-//#include "debug.c"
+#include "debug.c"
static void memreset_setup(void)
{
/* Set the memreset low */
- outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(0<<0), SMBUS_IO_BASE + 0xc0 + 28);
+// outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(0<<0), SMBUS_IO_BASE + 0xc0 + 28);
/* Ensure the BIOS has control of the memory lines */
- outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(0<<0), SMBUS_IO_BASE + 0xc0 + 29);
+// outb((0 << 7)|(0 << 6)|(0<<5)|(0<<4)|(1<<2)|(0<<0), SMBUS_IO_BASE + 0xc0 + 29);
}
static void memreset(int controllers, const struct mem_controller *ctrl)
{
udelay(800);
/* Set memreset_high */
- outb((0<<7)|(0<<6)|(0<<5)|(0<<4)|(1<<2)|(1<<0), SMBUS_IO_BASE + 0xc0 + 28);
+// outb((0<<7)|(0<<6)|(0<<5)|(0<<4)|(1<<2)|(1<<0), SMBUS_IO_BASE + 0xc0 + 28);
udelay(90);
}
@@ -179,7 +179,7 @@ static void main(void)
memreset_setup();
sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu);
-#if 0
+#if 1
dump_pci_devices();
#endif
#if 0
diff --git a/src/mainboard/tyan/s2880/chip.h b/src/mainboard/tyan/s2880/chip.h
index b867070275..d2b1b820d9 100644
--- a/src/mainboard/tyan/s2880/chip.h
+++ b/src/mainboard/tyan/s2880/chip.h
@@ -2,4 +2,5 @@ extern struct chip_control mainboard_tyan_s2880_control;
struct mainboard_tyan_s2880_config {
int fixup_scsi;
+ int fixup_vga;
};
diff --git a/src/mainboard/tyan/s2880/mainboard.c b/src/mainboard/tyan/s2880/mainboard.c
index 446dd32bd4..8efc0a5d1b 100644
--- a/src/mainboard/tyan/s2880/mainboard.c
+++ b/src/mainboard/tyan/s2880/mainboard.c
@@ -11,7 +11,7 @@ unsigned long initial_apicid[MAX_CPUS] =
{
0,1
};
-/*
+#if 0
static void fixup_lsi_53c1030(struct device *pdev)
{
// uint8_t byte;
@@ -35,9 +35,10 @@ static void fixup_lsi_53c1030(struct device *pdev)
// lsi_scsi_init(pdev);
}
-*/
+#endif
//extern static void lsi_scsi_init(struct device *dev);
-/*static void print_pci_regs(struct device *dev)
+#if 1
+static void print_pci_regs(struct device *dev)
{
uint8_t byte;
int i;
@@ -45,72 +46,67 @@ static void fixup_lsi_53c1030(struct device *pdev)
for(i=0;i<256;i++) {
byte = pci_read_config8(dev, i);
- if((i%16)==0) printk_info("\n %02x:",i);
- printk_debug(" %02x ",byte);
+ if((i%16)==0) printk_info("\n%02x:",i);
+ printk_debug(" %02x",byte);
}
- printk_debug("\r\n");
+ printk_debug("\n");
// pci_write_config8(dev, 0x4, byte);
}
-*/
-static void onboard_scsi_fixup(void)
+#endif
+#if 0
+static void print_mem(void)
{
-// struct device *dev;
-
-/* // Set the scsi device id's
- printk_debug("%2d:%2d:%2d\n",0,1,0);
- dev = dev_find_slot(0, PCI_DEVFN(0x1, 0));
- if (dev) {
- print_pci_regs(dev);
- }
- // Set the scsi device id's
- printk_debug("%2d:%2d:%2d\n",0,2,0);
- dev = dev_find_slot(0, PCI_DEVFN(0x2, 0));
- if (dev) {
- print_pci_regs(dev);
- }
+ int i;
+ int low_1MB = 0;
+ for(i=low_1MB;i<low_1MB+1024*4;i++) {
+ if((i%16)==0) printk_debug("\n %08x:",i);
+ printk_debug(" %02x ",(unsigned char)*((unsigned char *)i));
+ }
+
+ for(i=low_1MB;i<low_1MB+1024*4;i++) {
+ if((i%16)==0) printk_debug("\n %08x:",i);
+ printk_debug(" %c ",(unsigned char)*((unsigned char *)i));
+ }
+ }
+#endif
+#if 0
+static void amd8111_enable_rom(void)
+{
+ uint8_t byte;
+ struct device *dev;
- // Set the scsi device id's
- printk_debug("%2d:%2d:%2d\n",0,3,0);
- dev = dev_find_slot(0, PCI_DEVFN(0x3, 0));
- if (dev) {
- print_pci_regs(dev);
- }
+ /* Enable 4MB rom access at 0xFFC00000 - 0xFFFFFFFF */
+ /* Locate the amd8111 */
+ dev = dev_find_device(0x1022, 0x7468, 0);
- // Set the scsi device id's
- printk_debug("%2d:%2d:%2d\n",1,0x7,0);
- dev = dev_find_slot(1, PCI_DEVFN(0x7, 0));
- if (dev) {
- print_pci_regs(dev);
- }
- // Set the scsi device id's
- printk_debug("%2d:%2d:%2d\n",1,0x8,0);
- dev = dev_find_slot(1, PCI_DEVFN(0x8, 0));
- if (dev) {
- print_pci_regs(dev);
- }
- printk_debug("%2d:%2d:%2d\n",2,3,0);
- dev = dev_find_slot(2, PCI_DEVFN(0x3, 0));
- if (dev) {
- print_pci_regs(dev);
- }
- // Set the scsi device id's
- printk_debug("%2d:%2d:%2d\n",2,6,0);
- dev = dev_find_slot(2, PCI_DEVFN(0x6, 0));
- if (dev) {
- print_pci_regs(dev);
- }
- // Set the scsi device id's
- printk_debug("%2d:%2d:%2d\n",3,4,0);
- dev = dev_find_slot(3, PCI_DEVFN(0x4, 0));
- if (dev) {
- print_pci_regs(dev);
- }
-*/
+ /* Set the 4MB enable bit bit */
+ byte = pci_read_config8(dev, 0x43);
+ byte |= 0x80;
+ pci_write_config8(dev, 0x43, byte);
+}
+#endif
+static void onboard_scsi_fixup(void)
+{
+ struct device *dev;
+ unsigned char i,j,k;
+#if 1
+ for(i=0;i<=4;i++) {
+ for(j=0;j<=0x1f;j++) {
+ for (k=0;k<=6;k++){
+ dev = dev_find_slot(i, PCI_DEVFN(j, k));
+ if (dev) {
+ printk_debug("%02x:%02x:%02x",i,j,k);
+ print_pci_regs(dev);
+ }
+ }
+ }
+ }
+#endif
-/*
+#if 0
dev = dev_find_device(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_53C1030,0);
if(!dev) {
printk_info("LSI_SCSI_FW_FIXUP: No Device Found!");
@@ -118,9 +114,28 @@ static void onboard_scsi_fixup(void)
}
lsi_scsi_init(dev);
-*/
+#endif
+// print_mem();
+// amd8111_enable_rom();
+}
+/*
+static void vga_fixup(void) {
+ // we do this right here because:
+ // - all the hardware is working, and some VGA bioses seem to need
+ // that
+ // - we need page 0 below for linuxbios tables.
+#if CONFIG_REALMODE_IDT == 1
+ printk_debug("INSTALL REAL-MODE IDT\n");
+ setup_realmode_idt();
+#endif
+#if CONFIG_VGABIOS == 1
+ printk_debug("DO THE VGA BIOS\n");
+ do_vgabios();
+ post_code(0x93);
+#endif
+
}
-
+ */
static void
enable(struct chip *chip, enum chip_pass pass)
@@ -131,9 +146,14 @@ enable(struct chip *chip, enum chip_pass pass)
switch (pass) {
default: break;
- case CONF_PASS_PRE_BOOT:
+// case CONF_PASS_PRE_CONSOLE:
+// case CONF_PASS_PRE_PCI:
+// case CONF_PASS_POST_PCI:
+ case CONF_PASS_PRE_BOOT:
if (conf->fixup_scsi)
onboard_scsi_fixup();
+// if (conf->fixup_vga)
+// vga_fixup();
printk_debug("mainboard fixup pass %d done\r\n",
pass);
break;