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author | Marc Jones <marc.jones@se-eng.com> | 2013-10-29 22:13:38 -0600 |
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committer | Marc Jones <marc.jones@se-eng.com> | 2013-12-04 19:35:54 +0100 |
commit | 48a749a89844ba76ff1564d5009e81d4d8e06db8 (patch) | |
tree | 29f59d23efa13b9ce0e088865c6b50dd4f7fb66e /src/mainboard/technexion/tim8690/get_bus_conf.c | |
parent | 0da082b62542fae0f6882a90dcff7ddcf672d96d (diff) |
intel/cougar_canyon2: Intel CRB FSP based mainboard
Cougar Canyon 2 is a Ivybridge/PantherPoint reference board.
This implementation uses the Intel FSP (Vist the Intel FSP
website for details on FSP architecture and support).
The FSP does not support s3 at this time. S3 may be added
when it is available in the FSP. All other features and IO
ports are functional. Booted on Ubuntu 12.04 and 13.04,
Fedora 18 with SeaBIOS payload. Memtest86, FWTS, and
other tests pass.
Board support page will be updated on acceptance.
Change-Id: I26c0b82d7ac295498376ad4c3517a9d6660d1c01
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-on: http://review.coreboot.org/4018
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/technexion/tim8690/get_bus_conf.c')
0 files changed, 0 insertions, 0 deletions