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authorJeremy Soller <jeremy@system76.com>2020-07-20 15:24:19 -0600
committerMichael Niewöhner <c0d3z3r0@review.coreboot.org>2020-09-06 14:41:08 +0000
commit592b0ad3ef7e9dac25c3d35e07165464100e2a1b (patch)
tree1cce025dfa967113a01a4fd14e01358700973ced /src/mainboard/system76
parent41e9ad656435d50ae4502b108acbca5d63802fcd (diff)
mb/system76/lemp9: Drop DeepSx settings
The GPIOs required for DeepSx (e.g. SLP_SUS#) are not hooked up on the lemp9. Therefore, drop the DeepSx settings. Tested on lemp9, suspend works correctly. Signed-off-by: Jeremy Soller <jeremy@system76.com> Change-Id: Iab179abd7adc3a65dcfc43ce1b5742d514b711fb Reviewed-on: https://review.coreboot.org/c/coreboot/+/43629 Reviewed-by: Michael Niewöhner Reviewed-by: Felix Singer <felixsinger@posteo.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/system76')
-rw-r--r--src/mainboard/system76/lemp9/devicetree.cb8
1 files changed, 0 insertions, 8 deletions
diff --git a/src/mainboard/system76/lemp9/devicetree.cb b/src/mainboard/system76/lemp9/devicetree.cb
index da96dd3bf8..e0da72a96e 100644
--- a/src/mainboard/system76/lemp9/devicetree.cb
+++ b/src/mainboard/system76/lemp9/devicetree.cb
@@ -153,14 +153,6 @@ chip soc/intel/cannonlake
# Address 0x90: Decode 0xF00 - 0xFFF (AP/EC debug)
register "gen4_dec" = "0x00fc0F01"
-# PMC (soc/intel/cannonlake/pmc.c)
- # Enable deep Sx states
- register "deep_s3_enable_ac" = "0"
- register "deep_s3_enable_dc" = "0"
- register "deep_s5_enable_ac" = "1"
- register "deep_s5_enable_dc" = "1"
- register "deep_sx_config" = "DSX_EN_WAKE_PIN"
-
# PM Util (soc/intel/cannonlake/pmutil.c)
# GPE configuration
# Note that GPE events called out in ASL code rely on this