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authorLu, Pen-ChunX <pen-chunx.lu@intel.com>2024-06-15 00:48:28 +0800
committerLean Sheng Tan <sheng.tan@9elements.com>2024-11-07 10:01:18 +0000
commitf214acd6e570fa053f4a6366d6d4609f10a4ad80 (patch)
tree86bedd6673a15fead876a12d5a56113b835ef039 /src/mainboard/system76/tgl-u/spd
parenta80461f84b0a1fa6f4f41eee8564f6f192b86fc0 (diff)
soc/intel/xeon_sp: Add acpigen_write_PRT_pre_routed
acpigen_write_PRT_pre_routed writes _PRT covering all direct subordinate child devices based on interrupt line/pin info from their PCI configuration spaces. It is required that IRQ routing and PCI configuration space update to be done ahead of time. TEST=Build and boot on intel/archercity CRB Change-Id: Ic54888f76d2ec9804442bec5aec54267d9a16d7c Signed-off-by: Lu, Pen-ChunX <pen-chunx.lu@intel.com> Signed-off-by: Shuo Liu <shuo.liu@intel.com> Signed-off-by: Jincheng Li <jincheng.li@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/82253 Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@gmail.com>
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