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authorFelix Singer <felixsinger@posteo.net>2023-10-26 15:02:46 +0200
committerFelix Singer <service+coreboot-gerrit@felixsinger.de>2023-10-30 14:00:37 +0000
commitd163253ba047515e3317e9da38aa7cc5714a7f0c (patch)
tree0c0c7148194fb268d1ed23159df08f444c8a701b /src/mainboard/system76/cml-u/variants/galp4/overridetree.cb
parent1fd4d76043ca66be134dad16a8ba67ae75645ee6 (diff)
mb/system76/cannonlake/dt: Use comma separated list for arrays
In order to improve the readability of the settings, use a comma separated list to assign values to their indexes instead of repeating the option name for each index. Don't convert the settings for PCIe root ports as they should stay in the device scope of them. While on it, remove superfluous comments related to modified lines. Change-Id: I92414efc9ddb849ceb8b9c4f0bc564bdbd92773b Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78638 Reviewed-by: Tim Crawford <tcrawford@system76.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/system76/cml-u/variants/galp4/overridetree.cb')
-rw-r--r--src/mainboard/system76/cml-u/variants/galp4/overridetree.cb36
1 files changed, 20 insertions, 16 deletions
diff --git a/src/mainboard/system76/cml-u/variants/galp4/overridetree.cb b/src/mainboard/system76/cml-u/variants/galp4/overridetree.cb
index f6be0eb358..bbfc2ea208 100644
--- a/src/mainboard/system76/cml-u/variants/galp4/overridetree.cb
+++ b/src/mainboard/system76/cml-u/variants/galp4/overridetree.cb
@@ -3,27 +3,31 @@ chip soc/intel/cannonlake
subsystemid 0x1558 0x1403 inherit
device pci 14.0 on # USB xHCI
- # USB2
- register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)" # Type-A port 1
- register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # 3G / LTE
- register "usb2_ports[2]" = "USB2_PORT_TYPE_C(OC_SKIP)" # Type-C port 3
- register "usb2_ports[3]" = "USB2_PORT_MID(OC_SKIP)" # USB Board port 4
- register "usb2_ports[6]" = "USB2_PORT_MAX(OC_SKIP)" # Camera
- register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth
- # USB3
- register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A port 1
- register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # 4G
- register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-C port 3
- register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB Board port 4
- register "usb3_ports[4]" = "USB3_PORT_EMPTY" # Used by TBT
- register "usb3_ports[5]" = "USB3_PORT_EMPTY" # Used by TBT
+ register "usb2_ports" = "{
+ [0] = USB2_PORT_MID(OC_SKIP), /* Type-A port 1 */
+ [1] = USB2_PORT_MID(OC_SKIP), /* 3G / LTE */
+ [2] = USB2_PORT_TYPE_C(OC_SKIP), /* Type-C port 3 */
+ [3] = USB2_PORT_MID(OC_SKIP), /* USB Board port 4 */
+ [6] = USB2_PORT_MAX(OC_SKIP), /* Camera */
+ [9] = USB2_PORT_MID(OC_SKIP), /* Bluetooth */
+ }"
+ register "usb3_ports" = "{
+ [0] = USB3_PORT_DEFAULT(OC_SKIP), /* Type-A port 1 */
+ [1] = USB3_PORT_DEFAULT(OC_SKIP), /* 4G */
+ [2] = USB3_PORT_DEFAULT(OC_SKIP), /* Type-C port 3 */
+ [3] = USB3_PORT_DEFAULT(OC_SKIP), /* USB Board port 4 */
+ [4] = USB3_PORT_EMPTY, /* Used by TBT */
+ [5] = USB3_PORT_EMPTY, /* Used by TBT */
+ }"
end
device pci 15.0 on # I2C #0
# I2C HID not supported on galp4
end
device pci 17.0 on # SATA
- register "SataPortsEnable[0]" = "1"
- register "SataPortsEnable[2]" = "1"
+ register "SataPortsEnable" = "{
+ [0] = 1,
+ [2] = 1,
+ }"
end
device pci 1c.4 on # PCI Express Port 5
# PCI Express Root port #5 x4, Clock 4 (TBT)