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authorTim Crawford <tcrawford@system76.com>2022-11-01 11:59:02 -0600
committerFelix Held <felix-coreboot@felixheld.de>2022-11-04 01:04:58 +0000
commitfa5a4752065ebb75b419815f97e95b62f0847a9d (patch)
tree4cd4b54cbc3d070ae0295a786f7a3a13a4fad6a3 /src/mainboard/system76/adl-p/dsdt.asl
parent1bd23e392238755a00fece98f67d1f2a0952305f (diff)
mb/system76/adl-p: Add Darter Pro 8
The Darter Pro 8 (darp8) is an Alder Lake-P board. Tested with a custom TianoCore UefiPayloadPkg. Working: - PS/2 keyboard, touchpad - Both DIMM slots (with NMSO480E82-3200EA00) - M.2 NVMe SSD (with MZVL2500HCJQ) - M.2 SATA SSD (with WDS100T2B0B) - All USB ports - SD card reader - Webcam - Ethernet - WiFi/Bluetooth - Integrated graphics using Intel GOP driver - Backlight controls on Windows 10 and Linux 6.1 - HDMI output - DisplayPort output over USB-C - Internal microphone - Internal speakers - Combined header + mic 3.5mm audio - S0ix suspend/resume - Booting Pop!_OS Linux 22.04 with kernel 5.18.5 - Internal flashing with flashrom v1.2-703-g76118a7c10ed Not working: - Detection of devices in TBT slot on boot Change-Id: Icc84d6cc3aec7149d9b538305288bbe2b56d53e4 Signed-off-by: Tim Crawford <tcrawford@system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/65301 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/system76/adl-p/dsdt.asl')
-rw-r--r--src/mainboard/system76/adl-p/dsdt.asl33
1 files changed, 33 insertions, 0 deletions
diff --git a/src/mainboard/system76/adl-p/dsdt.asl b/src/mainboard/system76/adl-p/dsdt.asl
new file mode 100644
index 0000000000..cbf9e6a7e9
--- /dev/null
+++ b/src/mainboard/system76/adl-p/dsdt.asl
@@ -0,0 +1,33 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <acpi/acpi.h>
+DefinitionBlock(
+ "dsdt.aml",
+ "DSDT",
+ ACPI_DSDT_REV_2,
+ OEM_ID,
+ ACPI_TABLE_CREATOR,
+ 0x20110725
+)
+{
+ #include <acpi/dsdt_top.asl>
+ #include <soc/intel/common/block/acpi/acpi/platform.asl>
+ #include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
+ #include <cpu/intel/common/acpi/cpu.asl>
+
+ Device (\_SB.PCI0)
+ {
+ #include <soc/intel/common/block/acpi/acpi/northbridge.asl>
+ #include <soc/intel/alderlake/acpi/southbridge.asl>
+ #include <soc/intel/alderlake/acpi/tcss.asl>
+ }
+
+ #include <southbridge/intel/common/acpi/sleepstates.asl>
+
+ Scope (\_SB.PCI0.LPCB)
+ {
+ #include <drivers/pc80/pc/ps2_controller.asl>
+ }
+
+ #include "acpi/mainboard.asl"
+}