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authorEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-10-29 09:26:00 +1100
committerEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-11-07 23:13:22 +0100
commitbf9d122ecdb97ff6a236a2d8b7ad0e9877fe086c (patch)
tree7f8c72dded3136105171b6140e078151a47fe321 /src/mainboard/supermicro
parent0d84a2c03e9c3a65ddc3de173dc0c1045049c3dd (diff)
mainboard: Trivial - Make AGESA board include consistent
Change-Id: If6cb99469f56fff8f88b294b625f0a5205ec540b Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/7238 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Diffstat (limited to 'src/mainboard/supermicro')
-rw-r--r--src/mainboard/supermicro/h8qgi/romstage.c2
-rw-r--r--src/mainboard/supermicro/h8scm/romstage.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/supermicro/h8qgi/romstage.c b/src/mainboard/supermicro/h8qgi/romstage.c
index bd358c991e..27eb039cf3 100644
--- a/src/mainboard/supermicro/h8qgi/romstage.c
+++ b/src/mainboard/supermicro/h8qgi/romstage.c
@@ -26,7 +26,7 @@
#include <arch/stages.h>
#include "cpu/x86/bist.h"
#include "cpu/x86/lapic.h"
-#include "cpu/amd/car.h"
+#include <cpu/amd/car.h>
#include "agesawrapper.h"
#include <northbridge/amd/agesa/agesawrapper_call.h>
#include "northbridge/amd/agesa/family10/reset_test.h"
diff --git a/src/mainboard/supermicro/h8scm/romstage.c b/src/mainboard/supermicro/h8scm/romstage.c
index 1b642c4d39..1cf16f73ce 100644
--- a/src/mainboard/supermicro/h8scm/romstage.c
+++ b/src/mainboard/supermicro/h8scm/romstage.c
@@ -26,7 +26,7 @@
#include <arch/stages.h>
#include "cpu/x86/bist.h"
#include "cpu/x86/lapic.h"
-#include "cpu/amd/car.h"
+#include <cpu/amd/car.h>
#include "agesawrapper.h"
#include <northbridge/amd/agesa/agesawrapper_call.h>
#include "northbridge/amd/agesa/family10/reset_test.h"