This does the following:

cd coreboot/src/southbridge
svn mv i82801ca i82801cx
svn mv i82801dbm i82801dx
svn mv i82801er i82801ex
svn copy i82801xx i82801bx
svn mv i82801xx i82801ax

Plus, fixing up the filenames in these directories and the romstage.c and
Kconfig files of the mainboards using those drivers.
Plus, switching the thomson ip1000 and rca rm4100 to the i82801dx driver.

There's a lot more to be done, like 
- adding device IDs for the ICH3 and newer drivers that have been kept in
  i82801xx so far
- drop the additional parts support from the ax and bx drivers.


Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Joseph Smith <joe@settoplinux.org>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5167 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

9 files changed, 9 insertions, 9 deletions

diff --git a/src/mainboard/supermicro/x6dhe_g2/Kconfig b/src/mainboard/supermicro/x6dhe_g2/Kconfig
index eb3330c023..a456abea8a 100644
--- a/src/mainboard/supermicro/x6dhe_g2/Kconfig
+++ b/src/mainboard/supermicro/x6dhe_g2/Kconfig
@@ -3,7 +3,7 @@ config BOARD_SUPERMICRO_X6DHE_G2
 	select ARCH_X86
 	select CPU_INTEL_SOCKET_MPGA604
 	select NORTHBRIDGE_INTEL_E7520
-	select SOUTHBRIDGE_INTEL_I82801ER
+	select SOUTHBRIDGE_INTEL_I82801EX
 	select SOUTHBRIDGE_INTEL_PXHD
 	select SUPERIO_NSC_PC87427
 	select ROMCC
diff --git a/src/mainboard/supermicro/x6dhe_g2/devicetree.cb b/src/mainboard/supermicro/x6dhe_g2/devicetree.cb
index 4bb720707c..e621594b93 100644
--- a/src/mainboard/supermicro/x6dhe_g2/devicetree.cb
+++ b/src/mainboard/supermicro/x6dhe_g2/devicetree.cb
@@ -6,7 +6,7 @@ chip northbridge/intel/e7520  # MCH
 		device pnp 00.3 off end
 	end
 	device pci_domain 0 on
-		chip southbridge/intel/i82801er	# ICH5R 
+		chip southbridge/intel/i82801ex	# ICH5R 
 			register "pirq_a_d" = "0x0b070a05"
 			register "pirq_e_h" = "0x0a808080"
 
diff --git a/src/mainboard/supermicro/x6dhe_g2/romstage.c b/src/mainboard/supermicro/x6dhe_g2/romstage.c
index 4e9c1e270b..f38f4e9b07 100644
--- a/src/mainboard/supermicro/x6dhe_g2/romstage.c
+++ b/src/mainboard/supermicro/x6dhe_g2/romstage.c
@@ -12,7 +12,7 @@
 #include "pc80/serial.c"
 #include "arch/i386/lib/console.c"
 #include "lib/ramtest.c"
-#include "southbridge/intel/i82801er/i82801er_early_smbus.c"
+#include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"
 #include "northbridge/intel/e7520/raminit.h"
 #include "superio/nsc/pc87427/pc87427.h"
 #include "cpu/x86/lapic/boot_cpu.c"
diff --git a/src/mainboard/supermicro/x6dhr_ig/Kconfig b/src/mainboard/supermicro/x6dhr_ig/Kconfig
index 759e6d14ba..56653adc9b 100644
--- a/src/mainboard/supermicro/x6dhr_ig/Kconfig
+++ b/src/mainboard/supermicro/x6dhr_ig/Kconfig
@@ -3,7 +3,7 @@ config BOARD_SUPERMICRO_X6DHR_IG
 	select ARCH_X86
 	select CPU_INTEL_SOCKET_MPGA604
 	select NORTHBRIDGE_INTEL_E7520
-	select SOUTHBRIDGE_INTEL_I82801ER
+	select SOUTHBRIDGE_INTEL_I82801EX
 	select SOUTHBRIDGE_INTEL_PXHD
 	select SUPERIO_WINBOND_W83627HF
 	select ROMCC
diff --git a/src/mainboard/supermicro/x6dhr_ig/devicetree.cb b/src/mainboard/supermicro/x6dhr_ig/devicetree.cb
index 8a82ed7c40..921c54fff5 100644
--- a/src/mainboard/supermicro/x6dhr_ig/devicetree.cb
+++ b/src/mainboard/supermicro/x6dhr_ig/devicetree.cb
@@ -1,6 +1,6 @@
 chip northbridge/intel/e7520 # mch
 	device pci_domain 0 on 
-		chip southbridge/intel/i82801er # i82801er
+		chip southbridge/intel/i82801ex # i82801er
 			# USB ports
 			device pci 1d.0 on end
 			device pci 1d.1 on end
diff --git a/src/mainboard/supermicro/x6dhr_ig/romstage.c b/src/mainboard/supermicro/x6dhr_ig/romstage.c
index 314cc70325..0fd77d3a56 100644
--- a/src/mainboard/supermicro/x6dhr_ig/romstage.c
+++ b/src/mainboard/supermicro/x6dhr_ig/romstage.c
@@ -12,7 +12,7 @@
 #include "pc80/serial.c"
 #include "arch/i386/lib/console.c"
 #include "lib/ramtest.c"
-#include "southbridge/intel/i82801er/i82801er_early_smbus.c"
+#include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"
 #include "northbridge/intel/e7520/raminit.h"
 #include "superio/winbond/w83627hf/w83627hf.h"
 #include "cpu/x86/lapic/boot_cpu.c"
diff --git a/src/mainboard/supermicro/x6dhr_ig2/Kconfig b/src/mainboard/supermicro/x6dhr_ig2/Kconfig
index e25f8bf7d0..126739be10 100644
--- a/src/mainboard/supermicro/x6dhr_ig2/Kconfig
+++ b/src/mainboard/supermicro/x6dhr_ig2/Kconfig
@@ -3,7 +3,7 @@ config BOARD_SUPERMICRO_X6DHR_IG2
 	select ARCH_X86
 	select CPU_INTEL_SOCKET_MPGA604
 	select NORTHBRIDGE_INTEL_E7520
-	select SOUTHBRIDGE_INTEL_I82801ER
+	select SOUTHBRIDGE_INTEL_I82801EX
 	select SOUTHBRIDGE_INTEL_PXHD
 	select SUPERIO_WINBOND_W83627HF
 	select ROMCC
diff --git a/src/mainboard/supermicro/x6dhr_ig2/devicetree.cb b/src/mainboard/supermicro/x6dhr_ig2/devicetree.cb
index ab56509fd9..318d492b9f 100644
--- a/src/mainboard/supermicro/x6dhr_ig2/devicetree.cb
+++ b/src/mainboard/supermicro/x6dhr_ig2/devicetree.cb
@@ -1,6 +1,6 @@
 chip northbridge/intel/e7520 # mch
 	device pci_domain 0 on 
-		chip southbridge/intel/i82801er # i82801er
+		chip southbridge/intel/i82801ex # i82801er
 			# USB ports
 			device pci 1d.0 on end
 			device pci 1d.1 on end
diff --git a/src/mainboard/supermicro/x6dhr_ig2/romstage.c b/src/mainboard/supermicro/x6dhr_ig2/romstage.c
index 3cb41ad037..7a9b696198 100644
--- a/src/mainboard/supermicro/x6dhr_ig2/romstage.c
+++ b/src/mainboard/supermicro/x6dhr_ig2/romstage.c
@@ -12,7 +12,7 @@
 #include "pc80/serial.c"
 #include "arch/i386/lib/console.c"
 #include "lib/ramtest.c"
-#include "southbridge/intel/i82801er/i82801er_early_smbus.c"
+#include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"
 #include "northbridge/intel/e7520/raminit.h"
 #include "superio/winbond/w83627hf/w83627hf.h"
 #include "cpu/x86/lapic/boot_cpu.c"