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author | Shelley Chen <shchen@google.com> | 2023-11-30 14:08:11 -0800 |
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committer | Shelley Chen <shchen@google.com> | 2023-12-05 01:51:16 +0000 |
commit | 1a066312437fc2f8ac8bfad0dcfeb08e46c931ec (patch) | |
tree | 4bdb68520e5f3fed29781765413a790485ad8d60 /src/mainboard/supermicro/x9sae | |
parent | b164d7a291ac0a4fefe17a017e6e78a8f42befe3 (diff) |
mb/google/brox: Fix memory config
Fix up the memory config for brox based on the schematics. Also,
since memory training needs to happen in romstage, initializing the
MEM_STRAP & MEM_CH_SEL gpios for use in romstage. Also consolidating
the GPIOs needing to be initialized in romstage into the baseboard
gpio.c file.
BUG=b:300690448
BRANCH=None
TEST=emerge-brox coreboot
Change-Id: I17615cda7df10e73e49fb49f736728787ef7625d
Signed-off-by: Shelley Chen <shchen@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79355
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Ivy Jian <ivy.jian@quanta.corp-partner.google.com>
Diffstat (limited to 'src/mainboard/supermicro/x9sae')
0 files changed, 0 insertions, 0 deletions