mb/supermicro/x11: Make use of chipset devicetree

Use the references from the chipset devicetree as this makes the
comments superfluous and remove devices which are turned off.

Change-Id: I5176aa56ecaa52d0f42455bc7176b0415a6199ec
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78594
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

1 files changed, 15 insertions, 12 deletions

diff --git a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-f/overridetree.cb b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-f/overridetree.cb
index 4d54afe828..98bfb04fb3 100644
--- a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-f/overridetree.cb
+++ b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-f/overridetree.cb
@@ -41,44 +41,47 @@ chip soc/intel/skylake
 	}"
 
 	device domain 0 on
-		device pci 01.0 on
+		device ref peg0 on
+			# Slot JPCIE3
 			smbios_slot_desc "SlotTypePciExpressGen3X16" "SlotLengthShort" "CPU SLOT6 PCI-E 3.0 X8(IN X16)" "SlotDataBusWidth8X"
-		end			# CPU PCIE Slot (JPCIE3)
-		device pci 01.1 on	# CPU PCIE Slot (JPCIE2)
+		end
+		device ref peg1 on
+			# Slot JPCIE2
 			smbios_slot_desc "SlotTypePciExpressGen3X8" "SlotLengthShort" "CPU SLOT6 PCI-E 3.0 X8" "SlotDataBusWidth8X"
 		end
-		device pci 02.0 on end	# Integrated Graphics Device (No Output)
-		device pci 1c.0 on	# PCI Express Port 1
+		device ref igpu on end
+		device ref pcie_rp1 on
 			register "PcieRpEnable[0]" = "1"
 			device pci 00.0 on end	# GbE
 		end
-		device pci 1c.1 on	# PCI Express Port 2
+		device ref pcie_rp2 on
 			register "PcieRpEnable[1]" = "1"
 			device pci 00.0 on end	# GbE
 		end
-		device pci 1c.2 on	# PCI Express Port 3 only on -LN4F
+		device ref pcie_rp3 on
 			register "PcieRpEnable[2]" = "1"
 			device pci 00.0 on end	# GbE
 		end
-		device pci 1c.3 on	# PCI Express Port 4 only on -LN4F
+		device ref pcie_rp4 on
 			register "PcieRpEnable[3]" = "1"
 			device pci 00.0 on end	# GbE
 		end
-		device pci 1c.4 on	# PCI Express Port 5
+		device ref pcie_rp5 on
 			register "PcieRpEnable[4]" = "1"
 			smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2 2280" "SlotDataBusWidth2X"
 		end
-		device pci 1c.6 on	# PCI Express Port 7
+		device ref pcie_rp7 on
 			register "PcieRpEnable[6]" = "1"
 			device pci 00.0 on	# Aspeed PCI Bridge
 				device pci 00.0 on end	# Aspeed 2400 VGA
 			end
 		end
-		device pci 1d.0 on	# PCI Express Port 9 (Slot JPCIE1)
+		device ref pcie_rp9 on
+			# Slot JPCIE1
 			register "PcieRpEnable[8]" = "1"
 			smbios_slot_desc "SlotTypePciExpressGen3X4" "SlotLengthLong" "PCH SLOT4 PCI-E 3.0 X4(IN X8)" "SlotDataBusWidth4X"
 		end
-		device pci 1f.0 on	# LPC Interface
+		device ref lpc_espi on
 			chip drivers/ipmi
 				# On cold boot it takes a while for the BMC to start the IPMI service
 				register "wait_for_bmc" = "1"