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author | Karthikeyan Ramasubramanian <kramasub@google.com> | 2020-05-04 13:36:23 -0600 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2020-05-06 08:47:28 +0000 |
commit | 0985fba3705607ecf571082b241018c0d1bd962d (patch) | |
tree | db857b4c186f904536e6d5c388f370a73e0fdfa9 /src/mainboard/supermicro/x10slm-f | |
parent | 4a36cfb625653a1849edd7651ed81a0c7007a612 (diff) |
mb/google/dedede: Enable PMC, P2SB and PCH SPI in the devicetree
BUG=None
TEST=Build and boot the mainboard.
Change-Id: I1aae4adf1c13fd4ff58aa38a877f34e142f320f1
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41037
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/supermicro/x10slm-f')
0 files changed, 0 insertions, 0 deletions