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author | Patrick Georgi <pgeorgi@google.com> | 2019-01-10 14:14:16 +0100 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2019-01-10 13:34:52 +0000 |
commit | 4b2553eea53b0265db6650e1486647fda82f07a3 (patch) | |
tree | 57ecade4adf9af33f42562a1996c4b5f12bb86bd /src/mainboard/supermicro/h8scm_fam10/mptable.c | |
parent | 75292a139ed0da9006dffdc6d48a47db91c90f50 (diff) |
soc/intel/cannonlake: complete rename of TCO2_STS_SECOND_TO
TCO2_STS_SECOND_TO was renamed to TCO_STS_SECOND_TO but one use
slipped through.
Change-Id: I9e3b1cc5cb2f319db35416edf6cea612d755d40a
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/30805
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/supermicro/h8scm_fam10/mptable.c')
0 files changed, 0 insertions, 0 deletions