diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2016-09-27 21:11:57 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-09-28 22:09:32 +0200 |
| commit | c6317e0c954506126eca8d28ef9f354020b81aa5 (patch) | |
| tree | 8ea8507af6fa9fa1696a8e504f923ef6587c9370 /src/mainboard/supermicro/h8qme_fam10/romstage.c | |
| parent | 497b5fe87a54862e75652befed3f23d1c0e37dac (diff) | |
mainboard/supermicro/h8qme_fam10/romstage.c: Use tabs for indents
Change-Id: I6ca564294ff3d8eaeae21c0e2c008401aa3f32ff
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16774
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/supermicro/h8qme_fam10/romstage.c')
| -rw-r--r-- | src/mainboard/supermicro/h8qme_fam10/romstage.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/supermicro/h8qme_fam10/romstage.c b/src/mainboard/supermicro/h8qme_fam10/romstage.c index f82ddd13c2..16f0d8ace0 100644 --- a/src/mainboard/supermicro/h8qme_fam10/romstage.c +++ b/src/mainboard/supermicro/h8qme_fam10/romstage.c @@ -172,17 +172,17 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) timestamp_init(timestamp_get()); timestamp_add_now(TS_START_ROMSTAGE); - if (!cpu_init_detectedx && boot_cpu()) { + if (!cpu_init_detectedx && boot_cpu()) { /* Nothing special needs to be done to find bus 0 */ /* Allow the HT devices to be found */ set_bsp_node_CHtExtNodeCfgEn(); enumerate_ht_chain(); sio_setup(); - } + } post_code(0x30); - if (bist == 0) + if (bist == 0) bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo); post_code(0x32); |