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authorNick Vaccaro <nvaccaro@google.com>2019-08-29 20:11:48 -0700
committerPatrick Georgi <pgeorgi@google.com>2019-09-10 12:17:56 +0000
commit98189771abcf2a56a22f394de21bf512e88db608 (patch)
tree0d2c313589e5d8ece17d96bbc484f97d46ec2ff6 /src/mainboard/supermicro/h8dmr_fam10
parent687c419cde408cb4fb1bbfee984e330394b86527 (diff)
mb/google/poppy/variant/nocturne: add EC_SYNC_GPIO
Setup EC_PCH_ARCORE_INT_L, tied to GPP_D17, and define as EC_SYNC_GPIO.. - change GPP_D17 definition to PAD_CFG_GPI_APIC_INVERT as EC_PCH_ARCORE_INT_L is active low - add EC_SYNC_GPIO to the group of chromeos_gpios for use by depthcharge BUG=b:139384979 BRANCH=none TEST="emerge_nocturne coreboot depthcharge chromeos-bootimage", flash & boot nocturne in dev mode, verify that volume up and down buttons work in the dev screen and that the device boots properly into the kernel. Change-Id: Ia43c622710fde8686c60b836fb8318931d79eb61 Signed-off-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35174 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/supermicro/h8dmr_fam10')
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