Winbond W83627HF: Use existing functions instead of open-coding.

Use w83627hf_set_clksel_48() where needed instead or open-coding the same
functionality, and also use w83627hf_enable_serial() instead of 
w83627hf_enable_dev() (which does exactly the same, but isn't wrapped in the
enter/exit config mode functions).

Abuild-tested.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6143 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

1 files changed, 3 insertions, 4 deletions

diff --git a/src/mainboard/supermicro/h8dmr_fam10/romstage.c b/src/mainboard/supermicro/h8dmr_fam10/romstage.c
index 43d4ff7e72..966ae3b694 100644
--- a/src/mainboard/supermicro/h8dmr_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8dmr_fam10/romstage.c
@@ -50,6 +50,7 @@
 #include "southbridge/nvidia/mcp55/mcp55_early_ctrl.c"
 
 #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
+#define DUMMY_DEV PNP_DEV(0x2e, 0)
 
 static void activate_spd_rom(const struct mem_controller *ctrl) { }
 
@@ -125,10 +126,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
 	post_code(0x32);
 
-	pnp_enter_ext_func_mode(SERIAL_DEV);
-	pnp_write_config(SERIAL_DEV, 0x24, 0x84 | (1 << 6));
-	w83627hf_enable_dev(SERIAL_DEV, CONFIG_TTYS0_BASE);
-	pnp_exit_ext_func_mode(SERIAL_DEV);
+	w83627hf_set_clksel_48(DUMMY_DEV);
+	w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
 
 	uart_init();
 	console_init();