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author | Kane Chen <kane.chen@intel.corp-partner.google.com> | 2024-04-12 21:16:32 +0800 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2024-05-07 12:51:25 +0000 |
commit | b9d489e01d159f9e34f16b9571d6e60c9071eb35 (patch) | |
tree | 7044a1fae23c00a197f0aad43963c709dfe4f004 /src/mainboard/supermicro/Kconfig | |
parent | 8c927c4dbf94a140a460b935f87fb1002532c6f7 (diff) |
soc/intel/meteorlake: Determine TBT controllers exist by VID/DID
The original code uses TRE0-TRE3 register to determine whether or not
the TBT controller exists. However, there is a remap in fsp could confuse
the TRPx._STA.
Ex:
Disable TBT controller 0 on b:0 d:7 f:0
Enable TBT controller 1 on b:0 d:7 f:1
The FSP will do the remap and after the remap:
TBT controller 1 is on b:0 d:7 f:0
TBT controller 0 is on b:0 d:7 f:1
This is becuase func 0 must exist per pci spec.
However, the TRE0-TRE3 will not be remapped so that the ACPI
TRPx._STA method could be confused.
In such scenario, TRP0._STA will return 0x0, TRP1._STA will return
0xf which is wrong because TBT controller 1 is now at b:0 d:7 f:0
TEST=tested on rex and _TRPx._STA returns correctly. TBT function OK
Change-Id: I54f2ea99cd1ec73dd0b71a6ba738aa927b0ae80f
Signed-off-by: Kane Chen <kane.chen@intel.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81842
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/mainboard/supermicro/Kconfig')
0 files changed, 0 insertions, 0 deletions