diff options
| author | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2015-01-04 21:33:39 +1100 |
|---|---|---|
| committer | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2015-01-06 01:51:42 +0100 |
| commit | 77757c22b9eede92234d07d65a23fdf4b970c8cf (patch) | |
| tree | 29949ed8cfac9c5c9b2cf4c8071c74690411d32d /src/mainboard/sunw/ultra40 | |
| parent | d76ac6349df0147b9d8f7f09f8bb80343ecfb5e6 (diff) | |
mainboard/*/romstage.c: Sanitize system header inclusions
Fix system include paths to be consistent. Chipset support is
part of the Coreboot 'system' and hence 'non-local' (i.e., in
the same directory or context). One possible product of this, is
to perhaps allow future work to do pre-compiled headers (PCH) on
the buildbot for faster build times. However, this currently just
makes mainboard's consistent.
Change-Id: I2f3fd8a3d7864926461c960ca619bff635d7dea5
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/8085
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/mainboard/sunw/ultra40')
| -rw-r--r-- | src/mainboard/sunw/ultra40/romstage.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/sunw/ultra40/romstage.c b/src/mainboard/sunw/ultra40/romstage.c index 99d0dfb7be..8c4724fc25 100644 --- a/src/mainboard/sunw/ultra40/romstage.c +++ b/src/mainboard/sunw/ultra40/romstage.c @@ -10,14 +10,14 @@ #include <spd.h> #include <cpu/amd/model_fxx_rev.h> #include "northbridge/amd/amdk8/incoherent_ht.c" -#include "southbridge/nvidia/ck804/early_smbus.h" -#include "northbridge/amd/amdk8/raminit.h" +#include <southbridge/nvidia/ck804/early_smbus.h> +#include <northbridge/amd/amdk8/raminit.h> #include "lib/delay.c" -#include "cpu/x86/lapic.h" +#include <cpu/x86/lapic.h> #include "northbridge/amd/amdk8/reset_test.c" #include "northbridge/amd/amdk8/debug.c" #include <superio/smsc/lpc47b397/lpc47b397.h> -#include "cpu/x86/bist.h" +#include <cpu/x86/bist.h> #include "superio/smsc/lpc47b397/early_gpio.c" #include "northbridge/amd/amdk8/setup_resource_map.c" @@ -51,7 +51,7 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "lib/generic_sdram.c" #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" -#include "southbridge/nvidia/ck804/early_setup_ss.h" +#include <southbridge/nvidia/ck804/early_setup_ss.h> //set GPIO to input mode #define CK804_MB_SETUP \ |