diff options
author | Sean Rhodes <sean@starlabs.systems> | 2022-07-27 15:34:09 +0100 |
---|---|---|
committer | Martin Roth <martin.roth@amd.corp-partner.google.com> | 2022-08-19 14:32:40 +0000 |
commit | a21a738cce29f9810c1c05a7311648b1906c2bba (patch) | |
tree | 7970944f3ef8659603e446a6cea55a100f3a3c74 /src/mainboard/starlabs | |
parent | 6f138873fc6853f792b159c4483960848f5bf6b4 (diff) |
mb/starlabs/lite/glkr: Remove old comment from devicetree
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: Ib203451bb3da06efd1d3f6e48496b370d81f4b7b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66196
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/starlabs')
-rw-r--r-- | src/mainboard/starlabs/lite/variants/glkr/devicetree.cb | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mainboard/starlabs/lite/variants/glkr/devicetree.cb b/src/mainboard/starlabs/lite/variants/glkr/devicetree.cb index 9f7c5bb2b7..ea26ce3d47 100644 --- a/src/mainboard/starlabs/lite/variants/glkr/devicetree.cb +++ b/src/mainboard/starlabs/lite/variants/glkr/devicetree.cb @@ -74,7 +74,6 @@ chip soc/intel/apollolake register "SataPortsEnable[0]" = "1" end device ref xhci on - ### USB 2.0 Devices # Motherboard USB Type C register "usb2_port[0]" = "PORT_EN(OC1)" register "usb3_port[0]" = "PORT_EN(OC1)" |