diff options
author | Sean Rhodes <sean@starlabs.systems> | 2024-10-02 15:41:45 +0100 |
---|---|---|
committer | Sean Rhodes <sean@starlabs.systems> | 2024-10-10 16:00:57 +0000 |
commit | 9e3f614598ae9ede85fb9cdd436ae53c62cfdefd (patch) | |
tree | 4286a63e40038c01cb6058d73620e5615e7a6839 /src/mainboard/starlabs/starbook | |
parent | c2fdb2221fe995b2eb4a39f0a493e41d36b63a59 (diff) |
mb/starlabs/*: Disable c6dram
None of these boards support or use S0ix so c6dram isn't needed, so
disable it.
Change-Id: I8124899a1f7ce20442f28919f7315ee7e52355e5
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84632
Reviewed-by: Maxim <max.senia.poliak@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/starlabs/starbook')
4 files changed, 0 insertions, 4 deletions
diff --git a/src/mainboard/starlabs/starbook/variants/adl/devicetree.cb b/src/mainboard/starlabs/starbook/variants/adl/devicetree.cb index 0590de2a82..0d39dcf08f 100644 --- a/src/mainboard/starlabs/starbook/variants/adl/devicetree.cb +++ b/src/mainboard/starlabs/starbook/variants/adl/devicetree.cb @@ -1,7 +1,6 @@ chip soc/intel/alderlake # FSP UPDs register "eist_enable" = "true" - register "enable_c6dram" = "1" register "sagv" = "SaGv_Enabled" # Serial I/O diff --git a/src/mainboard/starlabs/starbook/variants/cml/devicetree.cb b/src/mainboard/starlabs/starbook/variants/cml/devicetree.cb index be392f810d..46b6142ebf 100644 --- a/src/mainboard/starlabs/starbook/variants/cml/devicetree.cb +++ b/src/mainboard/starlabs/starbook/variants/cml/devicetree.cb @@ -1,7 +1,6 @@ chip soc/intel/cannonlake # FSP UPDs register "eist_enable" = "true" - register "enable_c6dram" = "1" register "SaGv" = "SaGv_Enabled" # Graphics diff --git a/src/mainboard/starlabs/starbook/variants/rpl/devicetree.cb b/src/mainboard/starlabs/starbook/variants/rpl/devicetree.cb index b1793d3cf2..5eed658a0f 100644 --- a/src/mainboard/starlabs/starbook/variants/rpl/devicetree.cb +++ b/src/mainboard/starlabs/starbook/variants/rpl/devicetree.cb @@ -3,7 +3,6 @@ chip soc/intel/alderlake register "disable_dynamic_tccold_handshake" = "true" register "eist_enable" = "true" register "enable_c1e" = "true" - register "enable_c6dram" = "true" register "sagv" = "SaGv_Enabled" # Serial I/O diff --git a/src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb b/src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb index 6fd27bf547..d09c8a9826 100644 --- a/src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb +++ b/src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb @@ -1,7 +1,6 @@ chip soc/intel/tigerlake # FSP UPDs register "eist_enable" = "true" - register "enable_c6dram" = "1" register "CnviBtCore" = "true" register "CnviBtAudioOffload" = "1" register "SaGv" = "SaGv_Enabled" |