mb/starlabs/starbook/tgl: Use chipset.cb aliases

Change-Id: Ie9655406c7afe7a22f131d35633a697c5bbde4e3
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67027
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>

1 files changed, 20 insertions, 64 deletions

diff --git a/src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb b/src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb
index 5dd14d3afc..0ce297e82b 100644
--- a/src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb
+++ b/src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb
@@ -69,38 +69,23 @@ chip soc/intel/tigerlake
 	end
 
 	device domain 0 on
-		device pci 00.0 on  end						# Host Bridge
-		device pci 02.0 on  end						# Integrated Graphics Device
-		device pci 04.0 on  end						# SA Thermal Device
-		device pci 05.0 off end						# IPU
-		device pci 06.0 off end						# PEG60
-		device pci 07.0 on  end						# TBT_PCIe0
-		device pci 07.1 off end						# TBT_PCIe1
-		device pci 07.2 off end						# TBT_PCIe2
-		device pci 07.3 off end						# TBT_PCIe3
-		device pci 08.0 on  end						# Gaussian Mixture Model
-		device pci 09.0 off end						# NPK
-		device pci 0a.0 off end						# Crash-log SRAM
-		device pci 0d.0 on						# USB xHCI
+		device ref igpu		on  end
+		device ref dptf		on  end
+		device ref tbt_pcie_rp0	on  end
+		device ref gna		on  end
+		device ref north_xhci	on
 			register "UsbTcPortEn"			= "1"
 			register "TcssXhciEn"			= "1"
 			register "TcssAuxOri"			= "0"
 		end
-		device pci 0d.1 off end						# USB xDCI (OTG)
-		device pci 0d.2 on						# TBT DMA0
+		device ref tbt_dma0	on
 			chip drivers/intel/usb4/retimer
 				register "dfp[0].power_gpio"	= "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A23)"
 				use tcss_usb3_port1 as dfp[0].typec_port
 				device generic 0 on end
 			end
 		end
-		device pci 0d.3 off end						# TBT
-		device pci 0e.0 off end						# VMD
-		device pci 10.6 off end
-		device pci 10.7 off end
-		device pci 12.0 off end						# Thermal Subsystem
-		device pci 12.6 off end						# GSPI #2
-		device pci 14.0 on						# USB xHCI
+		device ref south_xhci	on
 			# Motherboard USB Type C
 			register "usb2_ports[0]"		= "USB2_PORT_TYPE_C(OC_SKIP)"
 			register "tcss_ports[0]"		= "TCSS_PORT_DEFAULT(OC_SKIP)"
@@ -122,15 +107,14 @@ chip soc/intel/tigerlake
 			# Internal Bluetooth
 			register "usb2_ports[9]"		= "USB2_PORT_MID(OC_SKIP)"
 		end
-		device pci 14.1 off end						# USB xDCI (OTG)
-		device pci 14.2 on  end						# USB xDCI (OTG)
-		device pci 14.3 on						# CNVi
+		device ref shared_ram	on  end
+		device ref cnvi_wifi	on
 			chip drivers/wifi/generic
 				register "wake"			= "GPE0_PME_B0"
 				device generic 0 on end
 			end
 		end
-		device pci 15.0 on						# I2C0
+		device ref i2c0		on
 			chip drivers/i2c/hid
 				register "generic.hid"		= ""STAR0001""
 				register "generic.desc"		= ""Touchpad""
@@ -140,33 +124,16 @@ chip soc/intel/tigerlake
 				device i2c 2c on end
 			end
 		end
-		device pci 15.1 off end						# I2C1
-		device pci 15.2 off end						# I2C2
-		device pci 15.3 off end						# I2C3
-		device pci 16.0 on  end						# Management Engine Interface 1
-		device pci 16.1 off end						# Management Engine Interface 2
-		device pci 16.2 off end						# Management Engine IDE-R
-		device pci 16.3 off end						# Management Engine KT Redirection
-		device pci 16.4 off end						# Management Engine Interface 3
-		device pci 16.5 off end						# Management Engine Interface 4
-		device pci 17.0 on						# SATA
+		device ref heci1	on  end
+		device ref sata		on
 			register "SataSalpSupport"		= "1"
 			# Port 1
 			register "SataPortsEnable[1]"		= "1"
 			register "SataPortsDevSlp[1]"		= "1"
 		end
-		device pci 19.0 on  end						# I2C4
-		device pci 19.1 off end						# I2C5
-		device pci 19.2 on  end						# UART #2
-		device pci 1c.0 off end						# PCI Express Port 1
-		device pci 1c.1 off end						# PCI Express Port 2
-		device pci 1c.2 off end						# PCI Express Port 3
-		device pci 1c.3 off end						# PCI Express Port 4
-		device pci 1c.4 off end						# PCI Express Port 5
-		device pci 1c.5 off end						# PCI Express Port 6
-		device pci 1c.6 off end						# PCI Express Port 7
-		device pci 1c.7 off end						# PCI Express Port 8
-		device pci 1d.0 on						# PCI Express Port 9 (SSD x4)
+		device ref i2c4		on  end
+		device ref uart2	on  end
+		device ref pcie_rp9	on
 			register "HybridStorageMode"		= "0"
 			register "PcieRpEnable[8]"		= "1"
 			register "PcieRpLtrEnable[8]"		= "1"
@@ -181,18 +148,11 @@ chip soc/intel/tigerlake
 				device generic 0 on end
 			end
 		end
-		device pci 1d.1 off end						# PCI Express Port 10
-		device pci 1d.2 off end						# PCI Express Port 11
-		device pci 1d.3 off end						# PCI Express Port 12
-		device pci 1e.0 off end						# UART #0
-		device pci 1e.1 off end						# UART #1
-		device pci 1e.2 off end						# GSPI #0
-		device pci 1e.3 on  end						# GSPI #1
-		device pci 1f.0 on						# LPC Interface
+		device ref gspi1	on  end
+		device ref pch_espi	on
 			register "gen1_dec"			= "0x000c1641"
 			register "gen2_dec"			= "0x000c0681"
 			register "gen3_dec"			= "0x000c0081"
-
 			chip drivers/pc80/tpm
 				device pnp 0c31.0 on end
 			end
@@ -221,14 +181,10 @@ chip soc/intel/tigerlake
 				device pnp 4e.19 off end			# Power Management Channel 5
 			end
 		end
-		device pci 1f.1 off end						# P2SB
-		device pci 1f.2 hidden end					# Power Management Controller
-		device pci 1f.3 on						# Intel HDA
+		device ref pmc		hidden end
+		device ref hda		on
 			register "PchHdaAudioLinkHdaEnable"	= "1"
 		end
-		device pci 1f.4 on  end						# SMBus
-		device pci 1f.5 on  end						# PCH SPI
-		device pci 1f.6 off end						# GbE
-		device pci 1f.7 off end						# TH
+		device ref smbus	on  end
 	end
 end