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authorTarun Tuli <taruntuli@google.com>2023-01-06 20:49:37 +0000
committerMartin L Roth <gaumless@gmail.com>2023-01-09 06:16:03 +0000
commitb5445ade38e5129ee19ddd97f4b3687fa28afd4b (patch)
treebd7bded13e5de6ed73ef08a3954060d27b827b50 /src/mainboard/sifive
parentef485f66ff4899ae94956b2305d40a41f44e6eb7 (diff)
mb/google/brya: Increase Resizable BAR address space limit to 33 bits
The dGPU used for some Brya projects requests 33 bits of address space for one of its BARs via the Resizable BAR mechanism (requires 6GB). This Kconfig is currently set at 32 bits for brya, so the allocation currently is capped at 32 bits (4GB). This patch sets the limit to 33 bits for brya boards, which is enough for the GPU. BUG=b:214443809 TEST=all of the dGPU PCI BARs on agah can be successfully allocated Change-Id: Ia791be5108fb07a256ae62fc2aee2f057909ef12 Signed-off-by: Tarun Tuli <tarun@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71282 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com>
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