diff options
| author | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-05-14 19:15:08 +1000 |
|---|---|---|
| committer | Marc Jones <marc.jones@se-eng.com> | 2014-05-28 20:08:21 +0200 |
| commit | 76d8fd6095edadbe12e2091eebfcb71dbcef798b (patch) | |
| tree | 66846d02d019756a3e1c64af209de2318e2778b0 /src/mainboard/siemens/sitemp_g1p1 | |
| parent | 470c37c372b6b6a6961a3b287f609f55c15f6d4c (diff) | |
mainboard/*: Convert to generic ITE superio romstage component
Convert mainboard's that use model specific romstage functions of
it8712f to the generic framework by following the reasoning of:
a7d14a1 ite/common: Introduce common watchdog and 3.3V VSB helpers
Change-Id: I1485306a951103c9a4bc0dbe87c416c91f46c36f
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5737
Tested-by: build bot (Jenkins)
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Diffstat (limited to 'src/mainboard/siemens/sitemp_g1p1')
| -rw-r--r-- | src/mainboard/siemens/sitemp_g1p1/romstage.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mainboard/siemens/sitemp_g1p1/romstage.c b/src/mainboard/siemens/sitemp_g1p1/romstage.c index b8af3548c7..eca7af23f2 100644 --- a/src/mainboard/siemens/sitemp_g1p1/romstage.c +++ b/src/mainboard/siemens/sitemp_g1p1/romstage.c @@ -47,6 +47,7 @@ #include "northbridge/amd/amdk8/debug.c" /* After sb600_early_setup.c! */ #define SERIAL_DEV PNP_DEV(0x2e, IT8712F_SP1) +#define GPIO_DEV PNP_DEV(0x2e, IT8712F_GPIO) /* CAN'T BE REMOVED! crt0.S will use it. I don't know WHY!*/ static void memreset(int controllers, const struct mem_controller *ctrl) @@ -107,7 +108,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) check_cmos(); // rebooting in case of corrupted cmos !!!!! #endif ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); - it8712f_kill_watchdog(); + ite_kill_watchdog(GPIO_DEV); console_init(); #if defined(DUMP_CMOS_RAM) && (DUMP_CMOS_RAM == 1) |