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authorUwe Poeche <uwe.poeche@siemens.com>2019-11-05 15:44:42 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-11-12 18:24:31 +0000
commit996588521a2240397b4a89e5ad5f5708f930dbc8 (patch)
treee2b3814dbcff2b46d751672f48f879b8b787d46d /src/mainboard/siemens/mc_apl1/variants
parent11a34ec4c230ab9a6a825eae57eb848aa052a6ed (diff)
src/mainboard/siemens: Use PTN3460 chip driver
This patch replaces and cleans up the redundant PTN3460 driver files in /mainboard/siemens directories by using the now available driver in src/drivers/i2c/ptn3460 and providing mainboard specific functions to the driver. TEST=Display is working on Siemens mainboards (e.g. mc_tcu3, mc_apl1, ...). Change-Id: I976a502e7176a356bab772758250db3cdff529b9 Signed-off-by: Uwe Poeche <uwe.poeche@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36643 Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/siemens/mc_apl1/variants')
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl1/Kconfig1
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl1/Makefile.inc2
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb4
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl1/include/variant/ptn3460.h91
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl1/lcd_panel.c102
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl1/mainboard.c12
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl1/ptn3460.c171
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl4/Kconfig1
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl4/Makefile.inc3
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb7
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl4/include/variant/ptn3460.h91
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl4/lcd_panel.c103
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl4/mainboard.c35
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl4/ptn3460.c172
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl5/Kconfig1
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl5/Makefile.inc2
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb4
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl5/include/variant/ptn3460.h91
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl5/lcd_panel.c128
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl5/mainboard.c12
-rw-r--r--src/mainboard/siemens/mc_apl1/variants/mc_apl5/ptn3460.c197
21 files changed, 353 insertions, 877 deletions
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/Kconfig b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/Kconfig
index 76d62fcf20..8b10a74ab5 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/Kconfig
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/Kconfig
@@ -8,5 +8,6 @@ config BOARD_SPECIFIC_OPTIONS
select DRIVER_SIEMENS_NC_FPGA
select NC_FPGA_NOTIFY_CB_READY
select APL_SKIP_SET_POWER_LIMITS
+ select DRIVERS_I2C_PTN3460
endif # BOARD_SIEMENS_MC_APL1
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/Makefile.inc b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/Makefile.inc
index adf9aff0d4..81633a1d93 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/Makefile.inc
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/Makefile.inc
@@ -1,2 +1,2 @@
ramstage-y += mainboard.c
-ramstage-y += ptn3460.c
+ramstage-y += lcd_panel.c
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb
index d65ac4e0a4..0e72fcf743 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb
@@ -93,6 +93,10 @@ chip soc/intel/apollolake
register "user_weekday" = "4"
device i2c 0x32 on end # RTC RX6110 SA
end
+ # Enable external display bridge (eDP to LVDS)
+ chip drivers/i2c/ptn3460
+ device i2c 0x20 on end # PTN3460 DP2LVDS Bridge
+ end
end
device pci 16.1 off end # - I2C 1
device pci 16.2 off end # - I2C 2
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/include/variant/ptn3460.h b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/include/variant/ptn3460.h
deleted file mode 100644
index 3ff35d9ee8..0000000000
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/include/variant/ptn3460.h
+++ /dev/null
@@ -1,91 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2014-2017 Siemens AG
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef PTN3460_H_
-#define PTN3460_H_
-
-#include <stdint.h>
-
-#define PTN_SLAVE_ADR 0x20
-#define PTN_I2C_CONTROLLER 0
-
-#define PTN_EDID_OFF 0x00
-#define PTN_EDID_LEN 0x80
-#define PTN_CONFIG_OFF 0x80
-#define PTN_FLASH_CFG_OFF 0xE8
-#define PTN_FLASH_CFG_LEN 0x04
-#define PTN_MAX_EDID_NUM 6
-
-/* Define some error codes that can be used. */
-#define PTN_NO_ERROR 0x00000000
-#define PTN_BUS_ERROR 0x10000000
-#define PTN_INVALID_EDID 0x20000000
-
-struct ptn_3460_config {
- /* DisplayPort interface control. */
- uint8_t dp_interface_ctrl;
- /* LVDS interface control register 1. */
- uint8_t lvds_interface_ctrl1;
- /* LVDS interface control register 2. */
- uint8_t lvds_interface_ctrl2;
- /* LVDS interface control register 3. */
- uint8_t lvds_interface_ctrl3;
- /* Select which EDID-block is emulated. */
- uint8_t edid_rom_emulation;
- /* Select which EDID block to map to 0..0x7F. */
- uint8_t edid_rom_access_ctrl;
- /* Smallest PWM frequency for back light. */
- uint8_t pwm_min[3];
- /* Biggest PWM frequency for back light. */
- uint8_t pwm_max[3];
- /* Fast link training control register. */
- uint8_t fast_link_ctrl;
- /* Pin configuration control register 1. */
- uint8_t pin_cfg_ctrl1;
- /* Pin configuration control register 2. */
- uint8_t pin_cfg_ctrl2;
- /* Default PWM bit count in DPCD register. */
- uint8_t pwm_default;
- /* Current PWM bit count in DPCD register. */
- uint16_t pwm_value;
- /* Default PWM frequency in DPCD register. */
- uint8_t pwm_default_freq;
- /* Panel T3 timing value. */
- uint8_t t3_timing;
- /* Panel T12 timing value. */
- uint8_t t12_timing;
- /* Back light control register. */
- uint8_t backlight_ctrl;
- /* Panel T2 delay. */
- uint8_t t2_delay;
- /* Panel T4 timing value. */
- uint8_t t4_timing;
- /* Panel T5 delay. */
- uint8_t t5_delay;
-} __packed;
-
-struct ptn_3460_flash {
- /* Flash command (erase or erase and flash). */
- uint8_t cmd;
- /* Magic number needed by the flash algorithm. */
- uint16_t magic;
- /* Trigger for starting flash operation. */
- uint8_t trigger;
-} __packed;
-
-int ptn3460_init(const char *hwi_block);
-int ptn3460_write_edid(uint8_t edid_num, const uint8_t data[PTN_EDID_LEN]);
-int ptn_select_edid(uint8_t edid_num);
-#endif /* PTN3460_H_ */
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/lcd_panel.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/lcd_panel.c
new file mode 100644
index 0000000000..e61588a02e
--- /dev/null
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/lcd_panel.c
@@ -0,0 +1,102 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014-2019 Siemens AG
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <console/console.h>
+#include <device/device.h>
+#include <drivers/i2c/ptn3460/ptn3460.h>
+#include <hwilib.h>
+#include <types.h>
+
+/** \brief This function provides EDID data to the driver for DP2LVDS Bridge (PTN3460)
+ * @param edid_data pointer to EDID data in driver
+*/
+enum cb_err mb_get_edid(uint8_t edid_data[0x80])
+{
+ const char *hwi_block = "hwinfo.hex";
+
+ if (hwilib_find_blocks(hwi_block) != CB_SUCCESS) {
+ printk(BIOS_ERR, "LCD: Info block \"%s\" not found!\n", hwi_block);
+ return CB_ERR;
+ }
+
+ /* Get EDID data from hwinfo block */
+ if (hwilib_get_field(Edid, edid_data, PTN_EDID_LEN) != PTN_EDID_LEN) {
+ printk(BIOS_ERR, "LCD: No EDID data available in %s\n", hwi_block);
+ return CB_ERR;
+ }
+ return CB_SUCCESS;
+}
+
+/** \brief This function provides EDID block [0..6] to the driver for DP2LVDS Bridge (PTN3460)
+ * which has to be used.
+*/
+uint8_t mb_select_edid_table(void)
+{
+ return 6; /* With this mainboard we use EDID block 6 for emulation in PTN3460. */
+}
+
+/** \brief Function to enable mainboard to adjust the config data of PTN3460.
+ * @param *cfg_ptr Pointer to the PTN config structure to modify.
+ * @return -1 on error; PTN_CFG_MODIFIED if data was modified and needs to be updated.
+*/
+int mb_adjust_cfg(struct ptn_3460_config *cfg)
+{
+ const char *hwi_block = "hwinfo.hex";
+ uint8_t disp_con = 0, color_depth = 0;
+
+ if (hwilib_find_blocks(hwi_block) != CB_SUCCESS) {
+ printk(BIOS_ERR, "LCD: Info block \"%s\" not found!\n", hwi_block);
+ return -1;
+ }
+
+ if (hwilib_get_field(PF_DisplCon, &disp_con, sizeof(disp_con)) != sizeof(disp_con)) {
+ printk(BIOS_ERR, "LCD: Missing panel features from %s\n", hwi_block);
+ return -1;
+ }
+ if (hwilib_get_field(PF_Color_Depth, &color_depth,
+ sizeof(color_depth)) != sizeof(color_depth)) {
+ printk(BIOS_ERR, "LCD: Missing panel features from %s\n", hwi_block);
+ return -1;
+ }
+ /* Set up configuration data according to the hwinfo block we got. */
+ cfg->dp_interface_ctrl = 0x00;
+ cfg->lvds_interface_ctrl1 = 0x00;
+ if (disp_con == PF_DISPLCON_LVDS_DUAL) {
+ /* Turn on dual LVDS lane and clock. */
+ cfg->lvds_interface_ctrl1 |= 0x0b;
+ }
+ if (color_depth == PF_COLOR_DEPTH_6BIT) {
+ /* Use 18 bits per pixel. */
+ cfg->lvds_interface_ctrl1 |= 0x20;
+ }
+ /* 1 % clock spreading, 300 mV LVDS swing. */
+ cfg->lvds_interface_ctrl2 = 0x13;
+ /* No LVDS lane swap. */
+ cfg->lvds_interface_ctrl3 = 0x00;
+ /* Delay T2 (VDD to LVDS active) by 16 ms. */
+ cfg->t2_delay = 1;
+ /* 500 ms from LVDS to backlight active. */
+ cfg->t3_timing = 10;
+ /* 1 second re-power delay. */
+ cfg->t12_timing = 20;
+ /* 150 ms backlight off to LVDS inactive. */
+ cfg->t4_timing = 3;
+ /* Delay T5 (LVDS to VDD inactive) by 16 ms. */
+ cfg->t5_delay = 1;
+ /* Enable backlight control. */
+ cfg->backlight_ctrl = 0;
+
+ return PTN_CFG_MODIFIED;
+}
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/mainboard.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/mainboard.c
index df6fc21bde..f119d5d19b 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/mainboard.c
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/mainboard.c
@@ -26,26 +26,14 @@
#include <timestamp.h>
#include <baseboard/variants.h>
#include <types.h>
-#include <variant/ptn3460.h>
#define TX_DWORD3 0xa8c
void variant_mainboard_final(void)
{
- int status;
struct device *dev = NULL;
/*
- * Set up the DP2LVDS converter.
- * ptn3460_init() may only be executed after i2c bus init.
- */
- status = ptn3460_init("hwinfo.hex");
- if (status)
- printk(BIOS_ERR, "LCD: Set up PTN with status 0x%x\n", status);
- else
- printk(BIOS_INFO, "LCD: Set up PTN was successful.\n");
-
- /*
* PIR6 register mapping for PCIe root ports
* INTA#->PIRQB#, INTB#->PIRQC#, INTC#->PIRQD#, INTD#-> PIRQA#
*/
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/ptn3460.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/ptn3460.c
deleted file mode 100644
index c0770f3124..0000000000
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/ptn3460.c
+++ /dev/null
@@ -1,171 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2014-2017 Siemens AG
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <console/console.h>
-#include <hwilib.h>
-#include <device/i2c_simple.h>
-#include <types.h>
-#include <variant/ptn3460.h>
-
-/**
- * This function sets up the DP2LVDS-converter to be used with the appropriate
- * lcd panel.
- *
- * @param *hwi_block Filename in CBFS of the block to use as HW-Info.
- * @return 0 on success or HWI-Data/PTN error code.
- */
-int ptn3460_init(const char *hwi_block)
-{
- struct ptn_3460_config cfg;
- int status;
- uint8_t disp_con = 0, color_depth = 0;
- uint8_t edid_data[PTN_EDID_LEN];
- int i;
-
- if (!hwi_block || hwilib_find_blocks(hwi_block) != CB_SUCCESS) {
- printk(BIOS_ERR, "LCD: Info block \"%s\" not found!\n",
- hwi_block);
- return 1;
- }
- /* Get all needed information from hwinfo block. */
- if (hwilib_get_field(Edid, edid_data, sizeof(edid_data)) !=
- sizeof(edid_data)) {
- printk(BIOS_ERR, "LCD: No EDID data available in %s\n",
- hwi_block);
- return 1;
- }
- if ((hwilib_get_field(PF_DisplCon, &disp_con, sizeof(disp_con)) !=
- sizeof(disp_con))) {
- printk(BIOS_ERR, "LCD: Missing panel features from %s\n",
- hwi_block);
- return 1;
- }
- if (hwilib_get_field(PF_Color_Depth, &color_depth, sizeof(color_depth))
- != sizeof(color_depth)) {
- printk(BIOS_ERR, "LCD: Missing panel features from %s\n",
- hwi_block);
- return 1;
- }
- /*
- * Here, all the desired information for setting up DP2LVDS converter
- * is present. Inside the converter, table 6 will be used for the
- * timings.
- */
- status = ptn3460_write_edid(6, edid_data);
- if (status)
- return status;
- /* Select this table to be emulated. */
- ptn_select_edid(6);
- /* Read PTN configuration data. */
- status = i2c_read_bytes(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR,
- PTN_CONFIG_OFF, (uint8_t *)&cfg,
- sizeof(cfg));
- if (status)
- return (PTN_BUS_ERROR | status);
- /* Set up configuration data according to the hwinfo block we get. */
- cfg.dp_interface_ctrl = 0;
- cfg.lvds_interface_ctrl1 = 0x00;
- if (disp_con == PF_DISPLCON_LVDS_DUAL)
- /* Turn on dual LVDS lane and clock. */
- cfg.lvds_interface_ctrl1 |= 0x0b;
- if (color_depth == PF_COLOR_DEPTH_6BIT)
- /* Use 18 bits per pixel. */
- cfg.lvds_interface_ctrl1 |= 0x20;
-
- /* 1 % clock spreading, 300 mV LVDS swing. */
- cfg.lvds_interface_ctrl2 = 0x13;
- /* No LVDS signal swap. */
- cfg.lvds_interface_ctrl3 = 0x00;
- /* Delay T2 (VDD to LVDS active) by 16 ms. */
- cfg.t2_delay = 1;
- /* 250 ms from LVDS to backlight active. */
- cfg.t3_timing = 10;
- /* 1 second re-power delay. */
- cfg.t12_timing = 20;
- /* 150 ms backlight off to LVDS inactive. */
- cfg.t4_timing = 3;
- /* Delay T5 (LVDS to VDD inactive) by 16 ms. */
- cfg.t5_delay = 1;
- /* Enable backlight control. */
- cfg.backlight_ctrl = 0;
-
- /* Write back configuration data to PTN3460. */
- for (i = 0; i < sizeof(struct ptn_3460_config); i++) {
- status = i2c_writeb(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR,
- PTN_CONFIG_OFF+i,
- *(((uint8_t *)&cfg)+i));
- if (status)
- return (PTN_BUS_ERROR | status);
- }
-
- return PTN_NO_ERROR;
-}
-
-/**
- * This function writes one Extended Display Identification Data (EDID)
- * structure to PTN3460.
- *
- * @param edid_num Number of EDID that must be written (0..6).
- * @param *data Pointer to a buffer where data to write is stored in.
- * @return 0 on success or error code.
- */
-int ptn3460_write_edid(uint8_t edid_num, const uint8_t data[PTN_EDID_LEN])
-{
- int status;
- int i;
-
- if (edid_num > PTN_MAX_EDID_NUM)
- return PTN_INVALID_EDID;
-
- /* First enable access to the desired EDID table. */
- status = i2c_writeb(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR,
- PTN_CONFIG_OFF + 5, edid_num);
- if (status)
- return (PTN_BUS_ERROR | status);
-
- /* Now we can simply write EDID-data to ptn3460. */
- for (i = 0; i < PTN_EDID_LEN; i++) {
- status = i2c_writeb(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR,
- PTN_EDID_OFF + i, data[i]);
- if (status)
- return (PTN_BUS_ERROR | status);
- }
-
- return PTN_NO_ERROR;
-}
-
-/**
- * This function selects one of 7 EDID-tables inside PTN3460 which should be
- * emulated on DisplayPort and turn emulation ON.
- *
- * @param edid_num Number of EDID to emulate (0..6).
- * @return 0 on success or error code.
- */
-int ptn_select_edid(uint8_t edid_num)
-{
- int status;
- uint8_t val;
-
- if (edid_num > PTN_MAX_EDID_NUM)
- return PTN_INVALID_EDID;
- /* Enable emulation of the desired EDID table. */
- val = (edid_num << 1) | 1;
- status = i2c_writeb(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR,
- PTN_CONFIG_OFF + 4, val);
- if (status)
- return (PTN_BUS_ERROR | status);
- else
- return PTN_NO_ERROR;
-}
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/Kconfig b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/Kconfig
index 31317b9280..b10bdc846b 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/Kconfig
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/Kconfig
@@ -8,6 +8,7 @@ config BOARD_SPECIFIC_OPTIONS
select MAINBOARD_HAS_TPM2
select MAINBOARD_HAS_LPC_TPM
select TPM_ON_FAST_SPI
+ select DRIVERS_I2C_PTN3460
config UART_FOR_CONSOLE
default 1
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/Makefile.inc b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/Makefile.inc
index 482abf83dc..b1e6a0f74f 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/Makefile.inc
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/Makefile.inc
@@ -2,5 +2,4 @@ romstage-y += memory.c
romstage-y += gpio.c
ramstage-y += gpio.c
-ramstage-y += mainboard.c
-ramstage-y += ptn3460.c
+ramstage-y += lcd_panel.c
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb
index fc9885ce7f..4074bae3bc 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb
@@ -75,7 +75,12 @@ chip soc/intel/apollolake
device pci 17.0 on end # - I2C 4
device pci 17.1 on end # - I2C 5
device pci 17.2 on end # - I2C 6
- device pci 17.3 on end # - I2C 7
+ device pci 17.3 on # - I2C 7
+ # Enable external display bridge (eDP to LVDS)
+ chip drivers/i2c/ptn3460
+ device i2c 0x60 on end # PTN3460 DP2LVDS Bridge
+ end
+ end
device pci 18.0 on end # - UART 0
device pci 18.1 on end # - UART 1
device pci 18.2 on end # - UART 2
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/include/variant/ptn3460.h b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/include/variant/ptn3460.h
deleted file mode 100644
index 2a52bf5e02..0000000000
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/include/variant/ptn3460.h
+++ /dev/null
@@ -1,91 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2014-2018 Siemens AG
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef PTN3460_H_
-#define PTN3460_H_
-
-#include <stdint.h>
-
-#define PTN_SLAVE_ADR 0x60
-#define PTN_I2C_CONTROLLER 7
-
-#define PTN_EDID_OFF 0x00
-#define PTN_EDID_LEN 0x80
-#define PTN_CONFIG_OFF 0x80
-#define PTN_FLASH_CFG_OFF 0xE8
-#define PTN_FLASH_CFG_LEN 0x04
-#define PTN_MAX_EDID_NUM 6
-
-/* Define some error codes that can be used. */
-#define PTN_NO_ERROR 0x00000000
-#define PTN_BUS_ERROR 0x10000000
-#define PTN_INVALID_EDID 0x20000000
-
-struct ptn_3460_config {
- /* DisplayPort interface control. */
- uint8_t dp_interface_ctrl;
- /* LVDS interface control register 1. */
- uint8_t lvds_interface_ctrl1;
- /* LVDS interface control register 2. */
- uint8_t lvds_interface_ctrl2;
- /* LVDS interface control register 3. */
- uint8_t lvds_interface_ctrl3;
- /* Select which EDID-block is emulated. */
- uint8_t edid_rom_emulation;
- /* Select which EDID block to map to 0..0x7F. */
- uint8_t edid_rom_access_ctrl;
- /* Smallest PWM frequency for back light. */
- uint8_t pwm_min[3];
- /* Biggest PWM frequency for back light. */
- uint8_t pwm_max[3];
- /* Fast link training control register. */
- uint8_t fast_link_ctrl;
- /* Pin configuration control register 1. */
- uint8_t pin_cfg_ctrl1;
- /* Pin configuration control register 2. */
- uint8_t pin_cfg_ctrl2;
- /* Default PWM bit count in DPCD register. */
- uint8_t pwm_default;
- /* Current PWM bit count in DPCD register. */
- uint16_t pwm_value;
- /* Default PWM frequency in DPCD register. */
- uint8_t pwm_default_freq;
- /* Panel T3 timing value. */
- uint8_t t3_timing;
- /* Panel T12 timing value. */
- uint8_t t12_timing;
- /* Back light control register. */
- uint8_t backlight_ctrl;
- /* Panel T2 delay. */
- uint8_t t2_delay;
- /* Panel T4 timing value. */
- uint8_t t4_timing;
- /* Panel T5 delay. */
- uint8_t t5_delay;
-} __packed;
-
-struct ptn_3460_flash {
- /* Flash command (erase or erase and flash). */
- uint8_t cmd;
- /* Magic number needed by the flash algorithm. */
- uint16_t magic;
- /* Trigger for starting flash operation. */
- uint8_t trigger;
-} __packed;
-
-int ptn3460_init(const char *hwi_block);
-int ptn3460_write_edid(uint8_t edid_num, const uint8_t data[PTN_EDID_LEN]);
-int ptn_select_edid(uint8_t edid_num);
-#endif /* PTN3460_H_ */
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/lcd_panel.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/lcd_panel.c
new file mode 100644
index 0000000000..abfcfe37a8
--- /dev/null
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/lcd_panel.c
@@ -0,0 +1,103 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014-2019 Siemens AG
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <console/console.h>
+#include <device/device.h>
+#include <drivers/i2c/ptn3460/ptn3460.h>
+#include <hwilib.h>
+#include <types.h>
+
+/** \brief This function provides EDID data to the driver for DP2LVDS Bridge (PTN3460)
+ * @param edid_data pointer to EDID data in driver
+*/
+enum cb_err mb_get_edid(uint8_t edid_data[0x80])
+{
+ const char *hwi_block = "hwinfo.hex";
+
+ if (hwilib_find_blocks(hwi_block) != CB_SUCCESS) {
+ printk(BIOS_ERR, "LCD: Info block \"%s\" not found!\n", hwi_block);
+ return CB_ERR;
+ }
+
+ /* Get EDID data from hwinfo block */
+ if (hwilib_get_field(Edid, edid_data, PTN_EDID_LEN) != PTN_EDID_LEN) {
+ printk(BIOS_ERR, "LCD: No EDID data available in %s\n", hwi_block);
+ return CB_ERR;
+ }
+ return CB_SUCCESS;
+}
+
+/** \brief This function provides EDID block [0..6] to the driver for DP2LVDS Bridge (PTN3460)
+ * which has to be used.
+*/
+uint8_t mb_select_edid_table(void)
+{
+ return 6; /* With this mainboard we use EDID block 6 for emulation in PTN3460. */
+}
+
+/** \brief Function to enable mainboard to adjust the config data of PTN3460.
+ * @param *cfg_ptr Pointer to the PTN config structure to modify.
+ * @return -1 on error; PTN_CFG_MODIFIED if data was modified and needs to be updated.
+*/
+int mb_adjust_cfg(struct ptn_3460_config *cfg)
+{
+ const char *hwi_block = "hwinfo.hex";
+ uint8_t disp_con = 0, color_depth = 0;
+
+ if (hwilib_find_blocks(hwi_block) != CB_SUCCESS) {
+ printk(BIOS_ERR, "LCD: Info block \"%s\" not found!\n", hwi_block);
+ return -1;
+ }
+
+ if (hwilib_get_field(PF_DisplCon, &disp_con, sizeof(disp_con)) != sizeof(disp_con)) {
+ printk(BIOS_ERR, "LCD: Missing panel features from %s\n", hwi_block);
+ return -1;
+ }
+ if (hwilib_get_field(PF_Color_Depth, &color_depth,
+ sizeof(color_depth)) != sizeof(color_depth)) {
+ printk(BIOS_ERR, "LCD: Missing panel features from %s\n", hwi_block);
+ return -1;
+ }
+ /* Set up configuration data according to the hwinfo block we got. */
+ cfg->dp_interface_ctrl = 0x00;
+ /* Use odd-bus for clock distribution only. */
+ cfg->lvds_interface_ctrl1 = 0x01;
+ if (disp_con == PF_DISPLCON_LVDS_DUAL) {
+ /* Turn on dual LVDS lane and clock. */
+ cfg->lvds_interface_ctrl1 |= 0x0b;
+ }
+ if (color_depth == PF_COLOR_DEPTH_6BIT) {
+ /* Use 18 bits per pixel. */
+ cfg->lvds_interface_ctrl1 |= 0x20;
+ }
+ /* No clock spreading, 300 mV LVDS swing. */
+ cfg->lvds_interface_ctrl2 = 0x03;
+ /* Swap LVDS lanes (N vs. P). */
+ cfg->lvds_interface_ctrl3 = 0x04;
+ /* Delay T2 (VDD to LVDS active) by 16 ms. */
+ cfg->t2_delay = 1;
+ /* 500 ms from LVDS to backlight active. */
+ cfg->t3_timing = 10;
+ /* 1 second re-power delay. */
+ cfg->t12_timing = 20;
+ /* 150 ms backlight off to LVDS inactive. */
+ cfg->t4_timing = 3;
+ /* Delay T5 (LVDS to VDD inactive) by 16 ms. */
+ cfg->t5_delay = 1;
+ /* Enable backlight control. */
+ cfg->backlight_ctrl = 0;
+
+ return PTN_CFG_MODIFIED;
+}
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/mainboard.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/mainboard.c
deleted file mode 100644
index 65e78bb378..0000000000
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/mainboard.c
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2018 Siemens AG
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <bootstate.h>
-#include <console/console.h>
-#include <hwilib.h>
-#include <baseboard/variants.h>
-#include <variant/ptn3460.h>
-
-void variant_mainboard_final(void)
-{
- int status;
-
- /*
- * Set up the DP2LVDS converter.
- * ptn3460_init() may only be executed after i2c bus init.
- */
- status = ptn3460_init("hwinfo.hex");
- if (status)
- printk(BIOS_ERR, "LCD: Set up PTN with status 0x%x\n", status);
- else
- printk(BIOS_INFO, "LCD: Set up PTN was successful.\n");
-}
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/ptn3460.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/ptn3460.c
deleted file mode 100644
index 47763ae5d8..0000000000
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/ptn3460.c
+++ /dev/null
@@ -1,172 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2014-2018 Siemens AG
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <console/console.h>
-#include <hwilib.h>
-#include <device/i2c_simple.h>
-#include <types.h>
-#include <variant/ptn3460.h>
-
-/*
- * This function sets up the DP2LVDS-converter to be used with the appropriate
- * lcd panel.
- *
- * @param *hwi_block Filename in CBFS of the block to use as HW-Info.
- * @return 0 on success or HWI-Data/PTN error code.
- */
-int ptn3460_init(const char *hwi_block)
-{
- struct ptn_3460_config cfg;
- int status;
- uint8_t disp_con = 0, color_depth = 0;
- uint8_t edid_data[PTN_EDID_LEN];
- int i;
-
- if (!hwi_block || hwilib_find_blocks(hwi_block) != CB_SUCCESS) {
- printk(BIOS_ERR, "LCD: Info block \"%s\" not found!\n",
- hwi_block);
- return 1;
- }
- /* Get all needed information from hwinfo block. */
- if (hwilib_get_field(Edid, edid_data, sizeof(edid_data)) !=
- sizeof(edid_data)) {
- printk(BIOS_ERR, "LCD: No EDID data available in %s\n",
- hwi_block);
- return 1;
- }
- if ((hwilib_get_field(PF_DisplCon, &disp_con, sizeof(disp_con)) !=
- sizeof(disp_con))) {
- printk(BIOS_ERR, "LCD: Missing panel features from %s\n",
- hwi_block);
- return 1;
- }
- if (hwilib_get_field(PF_Color_Depth, &color_depth, sizeof(color_depth))
- != sizeof(color_depth)) {
- printk(BIOS_ERR, "LCD: Missing panel features from %s\n",
- hwi_block);
- return 1;
- }
- /*
- * Here, all the desired information for setting up DP2LVDS converter
- * is present. Inside the converter, table 6 will be used for the
- * timings.
- */
- status = ptn3460_write_edid(6, edid_data);
- if (status)
- return status;
- /* Select this table to be emulated. */
- ptn_select_edid(6);
- /* Read PTN configuration data. */
- status = i2c_read_bytes(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR,
- PTN_CONFIG_OFF, (uint8_t *)&cfg,
- sizeof(cfg));
- if (status)
- return (PTN_BUS_ERROR | status);
- /* Set up configuration data according to the hwinfo block we get. */
- cfg.dp_interface_ctrl = 0;
- /* Use odd-bus for clock distribution only. */
- cfg.lvds_interface_ctrl1 = 0x01;
- if (disp_con == PF_DISPLCON_LVDS_DUAL)
- /* Turn on dual LVDS lane and clock. */
- cfg.lvds_interface_ctrl1 |= 0x0b;
- if (color_depth == PF_COLOR_DEPTH_6BIT)
- /* Use 18 bits per pixel. */
- cfg.lvds_interface_ctrl1 |= 0x20;
-
- /* No clock spreading, 300 mV LVDS swing. */
- cfg.lvds_interface_ctrl2 = 0x03;
- /* Swap LVDS signal (N vs. P). */
- cfg.lvds_interface_ctrl3 = 0x04;
- /* Delay T2 (VDD to LVDS active) by 16 ms. */
- cfg.t2_delay = 1;
- /* 250 ms from LVDS to backlight active. */
- cfg.t3_timing = 10;
- /* 1 second re-power delay. */
- cfg.t12_timing = 20;
- /* 150 ms backlight off to LVDS inactive. */
- cfg.t4_timing = 3;
- /* Delay T5 (LVDS to VDD inactive) by 16 ms. */
- cfg.t5_delay = 1;
- /* Enable backlight control. */
- cfg.backlight_ctrl = 0;
-
- /* Write back configuration data to PTN3460. */
- for (i = 0; i < sizeof(struct ptn_3460_config); i++) {
- status = i2c_writeb(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR,
- PTN_CONFIG_OFF+i,
- *(((uint8_t *)&cfg)+i));
- if (status)
- return (PTN_BUS_ERROR | status);
- }
-
- return PTN_NO_ERROR;
-}
-
-/*
- * This function writes one Extended Display Identification Data (EDID)
- * structure to PTN3460.
- *
- * @param edid_num Number of EDID that must be written (0..6).
- * @param *data Pointer to a buffer where data to write is stored in.
- * @return 0 on success or error code.
- */
-int ptn3460_write_edid(uint8_t edid_num, const uint8_t data[PTN_EDID_LEN])
-{
- int status;
- int i;
-
- if (edid_num > PTN_MAX_EDID_NUM)
- return PTN_INVALID_EDID;
-
- /* First enable access to the desired EDID table. */
- status = i2c_writeb(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR,
- PTN_CONFIG_OFF + 5, edid_num);
- if (status)
- return (PTN_BUS_ERROR | status);
-
- /* Now we can simply write EDID-data to ptn3460. */
- for (i = 0; i < PTN_EDID_LEN; i++) {
- status = i2c_writeb(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR,
- PTN_EDID_OFF + i, data[i]);
- if (status)
- return (PTN_BUS_ERROR | status);
- }
-
- return PTN_NO_ERROR;
-}
-
-/*
- * This function selects one of 7 EDID-tables inside PTN3460 which should be
- * emulated on DisplayPort and turn emulation ON.
- *
- * @param edid_num Number of EDID to emulate (0..6).
- * @return 0 on success or error code.
- */
-int ptn_select_edid(uint8_t edid_num)
-{
- int status;
- uint8_t val;
-
- if (edid_num > PTN_MAX_EDID_NUM)
- return PTN_INVALID_EDID;
- /* Enable emulation of the desired EDID table. */
- val = (edid_num << 1) | 1;
- status = i2c_writeb(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR,
- PTN_CONFIG_OFF + 4, val);
- if (status)
- return (PTN_BUS_ERROR | status);
- else
- return PTN_NO_ERROR;
-}
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/Kconfig b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/Kconfig
index 21d7ac7b78..e46a0de6f9 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/Kconfig
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/Kconfig
@@ -11,6 +11,7 @@ config BOARD_SPECIFIC_OPTIONS
select MAINBOARD_HAS_TPM2
select MAINBOARD_HAS_LPC_TPM
select TPM_ON_FAST_SPI
+ select DRIVERS_I2C_PTN3460
config CBFS_SIZE
default 0xb4e000
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/Makefile.inc b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/Makefile.inc
index 03759d2633..bd81552afc 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/Makefile.inc
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/Makefile.inc
@@ -2,4 +2,4 @@ romstage-y += gpio.c
ramstage-y += gpio.c
ramstage-y += mainboard.c
-ramstage-y += ptn3460.c
+ramstage-y += lcd_panel.c
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb
index 3b28a26396..723ecb369c 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb
@@ -84,6 +84,10 @@ chip soc/intel/apollolake
register "user_weekday" = "4"
device i2c 0x32 on end # RTC RX6110 SA
end
+ # Enable external display bridge (eDP to LVDS)
+ chip drivers/i2c/ptn3460
+ device i2c 0x20 on end # PTN3460 DP2LVDS Bridge
+ end
end
device pci 16.1 off end # - I2C 1
device pci 16.2 off end # - I2C 2
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/include/variant/ptn3460.h b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/include/variant/ptn3460.h
deleted file mode 100644
index 3ff35d9ee8..0000000000
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/include/variant/ptn3460.h
+++ /dev/null
@@ -1,91 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2014-2017 Siemens AG
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef PTN3460_H_
-#define PTN3460_H_
-
-#include <stdint.h>
-
-#define PTN_SLAVE_ADR 0x20
-#define PTN_I2C_CONTROLLER 0
-
-#define PTN_EDID_OFF 0x00
-#define PTN_EDID_LEN 0x80
-#define PTN_CONFIG_OFF 0x80
-#define PTN_FLASH_CFG_OFF 0xE8
-#define PTN_FLASH_CFG_LEN 0x04
-#define PTN_MAX_EDID_NUM 6
-
-/* Define some error codes that can be used. */
-#define PTN_NO_ERROR 0x00000000
-#define PTN_BUS_ERROR 0x10000000
-#define PTN_INVALID_EDID 0x20000000
-
-struct ptn_3460_config {
- /* DisplayPort interface control. */
- uint8_t dp_interface_ctrl;
- /* LVDS interface control register 1. */
- uint8_t lvds_interface_ctrl1;
- /* LVDS interface control register 2. */
- uint8_t lvds_interface_ctrl2;
- /* LVDS interface control register 3. */
- uint8_t lvds_interface_ctrl3;
- /* Select which EDID-block is emulated. */
- uint8_t edid_rom_emulation;
- /* Select which EDID block to map to 0..0x7F. */
- uint8_t edid_rom_access_ctrl;
- /* Smallest PWM frequency for back light. */
- uint8_t pwm_min[3];
- /* Biggest PWM frequency for back light. */
- uint8_t pwm_max[3];
- /* Fast link training control register. */
- uint8_t fast_link_ctrl;
- /* Pin configuration control register 1. */
- uint8_t pin_cfg_ctrl1;
- /* Pin configuration control register 2. */
- uint8_t pin_cfg_ctrl2;
- /* Default PWM bit count in DPCD register. */
- uint8_t pwm_default;
- /* Current PWM bit count in DPCD register. */
- uint16_t pwm_value;
- /* Default PWM frequency in DPCD register. */
- uint8_t pwm_default_freq;
- /* Panel T3 timing value. */
- uint8_t t3_timing;
- /* Panel T12 timing value. */
- uint8_t t12_timing;
- /* Back light control register. */
- uint8_t backlight_ctrl;
- /* Panel T2 delay. */
- uint8_t t2_delay;
- /* Panel T4 timing value. */
- uint8_t t4_timing;
- /* Panel T5 delay. */
- uint8_t t5_delay;
-} __packed;
-
-struct ptn_3460_flash {
- /* Flash command (erase or erase and flash). */
- uint8_t cmd;
- /* Magic number needed by the flash algorithm. */
- uint16_t magic;
- /* Trigger for starting flash operation. */
- uint8_t trigger;
-} __packed;
-
-int ptn3460_init(const char *hwi_block);
-int ptn3460_write_edid(uint8_t edid_num, const uint8_t data[PTN_EDID_LEN]);
-int ptn_select_edid(uint8_t edid_num);
-#endif /* PTN3460_H_ */
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/lcd_panel.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/lcd_panel.c
new file mode 100644
index 0000000000..1b0f730d0b
--- /dev/null
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/lcd_panel.c
@@ -0,0 +1,128 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014-2019 Siemens AG
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <console/console.h>
+#include <device/device.h>
+#include <device/pci_ops.h>
+#include <drivers/i2c/ptn3460/ptn3460.h>
+#include <hwilib.h>
+#include <soc/pci_devs.h>
+#include <types.h>
+
+static void igd_disable(void)
+{
+ struct device *root_dev = pcidev_path_on_root(SA_DEVFN_ROOT);
+ uint8_t deven;
+ uint16_t ggc;
+
+ /* GMCH Graphics Control Register */
+ ggc = pci_read_config16(root_dev, 0x50);
+ /* Set size of Graphics Translation Table Memory (GGMS) [7:6]
+ * to 0 and select 0 MB for Graphics Memory (GMS) [15:8]. */
+ ggc &= ~(0xffc0);
+ /* Disable IGD VGA (IVD). */
+ ggc |= 0x2;
+ pci_write_config16(root_dev, 0x50, ggc);
+ /* Device Enable Register */
+ deven = pci_read_config8(root_dev, 0x54);
+ /* Disable IGD device (D2F0EN). */
+ deven &= ~(0x10);
+ pci_write_config8(root_dev, 0x54, deven);
+}
+
+/** \brief This function provides EDID data to the driver for DP2LVDS Bridge (PTN3460)
+ * @param edid_data pointer to EDID data in driver
+*/
+enum cb_err mb_get_edid(uint8_t edid_data[0x80])
+{
+ const char *hwi_block = "hwinfo.hex";
+
+ if (hwilib_find_blocks(hwi_block) != CB_SUCCESS) {
+ printk(BIOS_ERR, "LCD: Info block \"%s\" not found!\n", hwi_block);
+ return CB_ERR;
+ }
+
+ /* Get EDID data from hwinfo block */
+ if (hwilib_get_field(Edid, edid_data, PTN_EDID_LEN) != PTN_EDID_LEN) {
+ /* Disable IGD to avoid panel failures. */
+ igd_disable();
+ printk(BIOS_ERR, "LCD: No EDID data available in %s\n", hwi_block);
+ return CB_ERR;
+ }
+ return CB_SUCCESS;
+}
+
+/** \brief This function provides EDID block [0..6] to the driver for DP2LVDS Bridge (PTN3460)
+ * which has to be used.
+*/
+uint8_t mb_select_edid_table(void)
+{
+ return 6; /* With this mainboard we use EDID block 6 for emulation in PTN3460. */
+}
+
+/** \brief Function to enable mainboard to adjust the config data of PTN3460.
+ * @param *cfg_ptr Pointer to the PTN config structure to modify.
+ * @return -1 on error; PTN_CFG_MODIFIED if data was modified and needs to be updated.
+*/
+int mb_adjust_cfg(struct ptn_3460_config *cfg)
+{
+ const char *hwi_block = "hwinfo.hex";
+ uint8_t disp_con = 0, color_depth = 0;
+
+ if (hwilib_find_blocks(hwi_block) != CB_SUCCESS) {
+ printk(BIOS_ERR, "LCD: Info block \"%s\" not found!\n", hwi_block);
+ return -1;
+ }
+
+ if (hwilib_get_field(PF_DisplCon, &disp_con, sizeof(disp_con)) != sizeof(disp_con)) {
+ printk(BIOS_ERR, "LCD: Missing panel features from %s\n", hwi_block);
+ return -1;
+ }
+ if (hwilib_get_field(PF_Color_Depth, &color_depth,
+ sizeof(color_depth)) != sizeof(color_depth)) {
+ printk(BIOS_ERR, "LCD: Missing panel features from %s\n", hwi_block);
+ return -1;
+ }
+ /* Set up configuration data according to the hwinfo block we got. */
+ cfg->dp_interface_ctrl = 0x00;
+ /* Drive LVDS clock for single mode on odd bus per default. */
+ cfg->lvds_interface_ctrl1 = 0x01;
+ if (disp_con == PF_DISPLCON_LVDS_DUAL) {
+ /* Turn on dual LVDS lane and clock. */
+ cfg->lvds_interface_ctrl1 |= 0x0b;
+ }
+ if (color_depth == PF_COLOR_DEPTH_6BIT) {
+ /* Use 18 bits per pixel. */
+ cfg->lvds_interface_ctrl1 |= 0x20;
+ }
+ /* 1 % clock spreading, 300 mV LVDS swing. */
+ cfg->lvds_interface_ctrl2 = 0x13;
+ /* No LVDS lane swap. */
+ cfg->lvds_interface_ctrl3 = 0x00;
+ /* Delay T2 (VDD to LVDS active) by 16 ms. */
+ cfg->t2_delay = 1;
+ /* 500 ms from LVDS to backlight active. */
+ cfg->t3_timing = 10;
+ /* 1 second re-power delay. */
+ cfg->t12_timing = 20;
+ /* 150 ms backlight off to LVDS inactive. */
+ cfg->t4_timing = 3;
+ /* Delay T5 (LVDS to VDD inactive) by 16 ms. */
+ cfg->t5_delay = 1;
+ /* Enable backlight control. */
+ cfg->backlight_ctrl = 0;
+
+ return PTN_CFG_MODIFIED;
+}
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/mainboard.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/mainboard.c
index e1b56bda13..f43cf8588c 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/mainboard.c
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/mainboard.c
@@ -27,27 +27,15 @@
#include <timestamp.h>
#include <baseboard/variants.h>
#include <types.h>
-#include <variant/ptn3460.h>
#define TX_DWORD3 0xa8c
void variant_mainboard_final(void)
{
- int status;
struct device *dev = NULL;
uint16_t cmd;
/*
- * Set up the DP2LVDS converter.
- * ptn3460_init() may only be executed after i2c bus init.
- */
- status = ptn3460_init("hwinfo.hex");
- if (status)
- printk(BIOS_ERR, "LCD: Set up PTN with status 0x%x\n", status);
- else
- printk(BIOS_INFO, "LCD: Set up PTN was successful.\n");
-
- /*
* PIR6 register mapping for PCIe root ports
* INTA#->PIRQB#, INTB#->PIRQC#, INTC#->PIRQD#, INTD#-> PIRQA#
*/
diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/ptn3460.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl5/ptn3460.c
deleted file mode 100644
index 2cc7dd4532..0000000000
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl5/ptn3460.c
+++ /dev/null
@@ -1,197 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2014-2017 Siemens AG
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <console/console.h>
-#include <hwilib.h>
-#include <device/i2c_simple.h>
-#include <device/pci_ops.h>
-#include <soc/pci_devs.h>
-#include <types.h>
-#include <variant/ptn3460.h>
-
-static void igd_disable(void)
-{
- struct device *root_dev = pcidev_path_on_root(SA_DEVFN_ROOT);
- uint8_t deven;
- uint16_t ggc;
-
- /* GMCH Graphics Control Register */
- ggc = pci_read_config16(root_dev, 0x50);
- /* Set size of Graphics Translation Table Memory (GGMS) [7:6]
- * to 0 and select 0 MB for Graphics Memory (GMS) [15:8]. */
- ggc &= ~(0xffc0);
- /* Disable IGD VGA (IVD). */
- ggc |= 0x2;
- pci_write_config16(root_dev, 0x50, ggc);
- /* Device Enable Register */
- deven = pci_read_config8(root_dev, 0x54);
- /* Disable IGD device (D2F0EN). */
- deven &= ~(0x10);
- pci_write_config8(root_dev, 0x54, deven);
-}
-
-/**
- * This function sets up the DP2LVDS-converter to be used with the appropriate
- * lcd panel.
- *
- * @param *hwi_block Filename in CBFS of the block to use as HW-Info.
- * @return 0 on success or HWI-Data/PTN error code.
- */
-int ptn3460_init(const char *hwi_block)
-{
- struct ptn_3460_config cfg;
- int status;
- uint8_t disp_con = 0, color_depth = 0;
- uint8_t edid_data[PTN_EDID_LEN];
- int i;
-
- if (!hwi_block || hwilib_find_blocks(hwi_block) != CB_SUCCESS) {
- printk(BIOS_ERR, "LCD: Info block \"%s\" not found!\n",
- hwi_block);
- return 1;
- }
- /* Get all needed information from hwinfo block. */
- if (hwilib_get_field(Edid, edid_data, sizeof(edid_data)) !=
- sizeof(edid_data)) {
- /* Disable IGD to avoid panel failures. */
- igd_disable();
- printk(BIOS_ERR, "LCD: No EDID data available in %s\n",
- hwi_block);
- return 1;
- }
- if ((hwilib_get_field(PF_DisplCon, &disp_con, sizeof(disp_con)) !=
- sizeof(disp_con))) {
- printk(BIOS_ERR, "LCD: Missing panel features from %s\n",
- hwi_block);
- return 1;
- }
- if (hwilib_get_field(PF_Color_Depth, &color_depth, sizeof(color_depth))
- != sizeof(color_depth)) {
- printk(BIOS_ERR, "LCD: Missing panel features from %s\n",
- hwi_block);
- return 1;
- }
- /*
- * Here, all the desired information for setting up DP2LVDS converter
- * is present. Inside the converter, table 6 will be used for the
- * timings.
- */
- status = ptn3460_write_edid(6, edid_data);
- if (status)
- return status;
- /* Select this table to be emulated. */
- ptn_select_edid(6);
- /* Read PTN configuration data. */
- status = i2c_read_bytes(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR,
- PTN_CONFIG_OFF, (uint8_t *)&cfg,
- sizeof(cfg));
- if (status)
- return (PTN_BUS_ERROR | status);
- /* Set up configuration data according to the hwinfo block we get. */
- cfg.dp_interface_ctrl = 0;
- /* Drive LVDS clock for single mode on odd bus per default. */
- cfg.lvds_interface_ctrl1 = 0x01;
- if (disp_con == PF_DISPLCON_LVDS_DUAL)
- /* Turn on dual LVDS lane and clock. */
- cfg.lvds_interface_ctrl1 |= 0x0b;
- if (color_depth == PF_COLOR_DEPTH_6BIT)
- /* Use 18 bits per pixel. */
- cfg.lvds_interface_ctrl1 |= 0x20;
-
- /* 1 % clock spreading, 300 mV LVDS swing. */
- cfg.lvds_interface_ctrl2 = 0x13;
- /* No LVDS signal swap. */
- cfg.lvds_interface_ctrl3 = 0x00;
- /* Delay T2 (VDD to LVDS active) by 16 ms. */
- cfg.t2_delay = 1;
- /* 250 ms from LVDS to backlight active. */
- cfg.t3_timing = 10;
- /* 1 second re-power delay. */
- cfg.t12_timing = 20;
- /* 150 ms backlight off to LVDS inactive. */
- cfg.t4_timing = 3;
- /* Delay T5 (LVDS to VDD inactive) by 16 ms. */
- cfg.t5_delay = 1;
- /* Enable backlight control. */
- cfg.backlight_ctrl = 0;
-
- /* Write back configuration data to PTN3460. */
- for (i = 0; i < sizeof(struct ptn_3460_config); i++) {
- status = i2c_writeb(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR,
- PTN_CONFIG_OFF+i,
- *(((uint8_t *)&cfg)+i));
- if (status)
- return (PTN_BUS_ERROR | status);
- }
-
- return PTN_NO_ERROR;
-}
-
-/**
- * This function writes one Extended Display Identification Data (EDID)
- * structure to PTN3460.
- *
- * @param edid_num Number of EDID that must be written (0..6).
- * @param *data Pointer to a buffer where data to write is stored in.
- * @return 0 on success or error code.
- */
-int ptn3460_write_edid(uint8_t edid_num, const uint8_t data[PTN_EDID_LEN])
-{
- int status;
- int i;
-
- if (edid_num > PTN_MAX_EDID_NUM)
- return PTN_INVALID_EDID;
-
- /* First enable access to the desired EDID table. */
- status = i2c_writeb(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR,
- PTN_CONFIG_OFF + 5, edid_num);
- if (status)
- return (PTN_BUS_ERROR | status);
-
- /* Now we can simply write EDID-data to ptn3460. */
- for (i = 0; i < PTN_EDID_LEN; i++) {
- status = i2c_writeb(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR,
- PTN_EDID_OFF + i, data[i]);
- if (status)
- return (PTN_BUS_ERROR | status);
- }
-
- return PTN_NO_ERROR;
-}
-
-/**
- * This function selects one of 7 EDID-tables inside PTN3460 which should be
- * emulated on DisplayPort and turn emulation ON.
- *
- * @param edid_num Number of EDID to emulate (0..6).
- * @return 0 on success or error code.
- */
-int ptn_select_edid(uint8_t edid_num)
-{
- int status;
- uint8_t val;
-
- if (edid_num > PTN_MAX_EDID_NUM)
- return PTN_INVALID_EDID;
- /* Enable emulation of the desired EDID table. */
- val = (edid_num << 1) | 1;
- status = i2c_writeb(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR,
- PTN_CONFIG_OFF + 4, val);
- if (status)
- return (PTN_BUS_ERROR | status);
- else
- return PTN_NO_ERROR;
-}