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authorMario Scheithauer <mario.scheithauer@siemens.com>2017-02-06 13:03:52 +0100
committerMartin Roth <martinroth@google.com>2017-02-15 21:38:03 +0100
commit6abdbcd4dc19f3fc2344ffcd9e3790e2a708d6b2 (patch)
tree6fa6b16c80eecf122def8012d63073b0fc821cf1 /src/mainboard/siemens/mc_apl1/mc_apl1.fmd
parentd0966d86d68795b64d3cf54af909339b74be1b6e (diff)
siemens/mc_apl1: Make basic settings for booting the mainboard
This commit makes a basic adjustment for GPIOs, device tree, flash map and MRC settings. With these basic settings the mainboard boots into Linux lubuntu 4.8.0-22-generic using SeaBIOS. More adjustments will follow. Change-Id: Ia920d236814f2e6a9b777dd1e4b4feef0ddf7721 Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-on: https://review.coreboot.org/18292 Tested-by: build bot (Jenkins) Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'src/mainboard/siemens/mc_apl1/mc_apl1.fmd')
-rw-r--r--src/mainboard/siemens/mc_apl1/mc_apl1.fmd20
1 files changed, 10 insertions, 10 deletions
diff --git a/src/mainboard/siemens/mc_apl1/mc_apl1.fmd b/src/mainboard/siemens/mc_apl1/mc_apl1.fmd
index 3da8467431..432e8de284 100644
--- a/src/mainboard/siemens/mc_apl1/mc_apl1.fmd
+++ b/src/mainboard/siemens/mc_apl1/mc_apl1.fmd
@@ -1,15 +1,16 @@
FLASH 16M {
- WP_RO@0x0 0x400000 {
+ WP_RO@0x0 0xe00000 {
SI_DESC@0x0 0x1000
- IFWI@0x1000 0x1ff000
- RO_VPD@0x200000 0x4000
- RO_SECTION@0x204000 0x1fc000 {
+ IFWI@0x1000 0x23f000
+ RO_VPD@0x240000 0x4000
+ RO_SECTION@0x244000 0xbbc000 {
FMAP@0x0 0x800
- COREBOOT(CBFS)@0x1000 0x1bb000
- RO_UNUSED@0x1bc000 0x40000
+ RO_UNUSED_1@0x800 0x800
+ COREBOOT(CBFS)@0x1000 0xbb9000
+ RO_UNUSED_2@0xbba000 0x1000
}
}
- MISC_RW@0x400000 0x30000 {
+ MISC_RW@0xe00000 0x30000 {
UNIFIED_MRC_CACHE@0x0 0x21000 {
RECOVERY_MRC_CACHE@0x0 0x10000
RW_MRC_CACHE@0x10000 0x10000
@@ -23,9 +24,8 @@ FLASH 16M {
RW_VPD@0x28000 0x2000
RW_NVRAM@0x2a000 0x6000
}
- RW_LEGACY(CBFS)@0xd30000 0x200000
- BIOS_UNUSABLE@0xf30000 0x4f000
- DEVICE_EXTENSION@0xf7f000 0x80000
+ BIOS_UNUSABLE@0xe30000 0xcf000
+ DEVICE_EXTENSION@0xeff000 0x100000
# Currently, it is required that the BIOS region be a multiple of 8KiB.
# This is required so that the recovery mechanism can find SIGN_CSE
# region aligned to 4K at the center of BIOS region. Since the