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authorElyes Haouas <ehaouas@noos.fr>2022-02-24 07:22:01 +0100
committerFelix Held <felix-coreboot@felixheld.de>2022-02-25 20:42:36 +0000
commit92c2ccda0cab63b989582584392565fcc93d4def (patch)
tree91f2d195ba5647c67052050a2317fe83bd0b2d1a /src/mainboard/scaleway
parentbd90a226a3ea0ecaa244dbc36be9fa1dabdb352a (diff)
sb/intel/ibexpeak/early_pch.c: Use PCI_BASE_ADDRESS_0 macro
Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Change-Id: If74e1db623d65d639041d49caf0ca1b6c0e1f2ad Reviewed-on: https://review.coreboot.org/c/coreboot/+/62326 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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