diff options
author | Nicola Corna <nicola@corna.info> | 2017-03-03 18:04:48 +0100 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2017-03-27 19:54:41 +0200 |
commit | 1bea5b7df226b7d632edcf9dc735e4a382e4d026 (patch) | |
tree | 2357b78a19591ec96cc10816cf884f8fb95f828b /src/mainboard/sapphire/pureplatinumh61/Kconfig | |
parent | 2fca86f370429272fa9deb0ff7d18c87f224e032 (diff) |
mainboard: Add Sapphire Pure Platinum H61
This board has a socketed SOIC-8 4 MB flash chip. All the flash
regions are unlocked by default but unfortunately flashrom
doesn't work with the original firmware and the stock UEFI flash
tool refuses to flash the coreboot image (different image ID).
For now, the external programmer seems to be the only option for
the first coreboot flashing.
Tested and working:
* Debian GNU/Linux Stretch (with Linux kernel 4.9, SeaBIOS)
* Microsoft Windows 7 installer with VGA blob (SeaBIOS)
* Internal GPU, both with VGA blob and libgfxinit (VGA and DVI)
* External GPU
* RAM (tested 8 + 8 GB)
* S3
* USB, both the 2.0 and 3.0 ports
* Sata
* Thermal management
* Sound
* LAN
* Bluetooth
* VT-x and VT-d
* me_cleaner
Not working:
* Microsoft Windows 7 installer with libgfxinit
Untested:
* Backside Mini PCI-E port
* DisplayPort and HDMI ports
Issues:
* The USB is always powered, even is S3 and S5 (like in the
original firmware).
* Internal flashing with flashrom doesn't work after resuming
from S3.
* The raminit is unreliable, as the RAM training sometimes fails
and sometimes succeeds, with the same couple of RAMs. Once
a MRC cache has been created, the raminit works fine.
* If an external card is inserted and the option
ONBOARD_VGA_IS_PRIMARY is not enabled, the internal GPU
disappears completely from the PCI bus.
Change-Id: I76aca2cfc4708c1728ae03ee4f6bc59d976c28a0
Signed-off-by: Nicola Corna <nicola@corna.info>
Reviewed-on: https://review.coreboot.org/18564
Tested-by: build bot (Jenkins)
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/mainboard/sapphire/pureplatinumh61/Kconfig')
-rw-r--r-- | src/mainboard/sapphire/pureplatinumh61/Kconfig | 68 |
1 files changed, 68 insertions, 0 deletions
diff --git a/src/mainboard/sapphire/pureplatinumh61/Kconfig b/src/mainboard/sapphire/pureplatinumh61/Kconfig new file mode 100644 index 0000000000..c01a524363 --- /dev/null +++ b/src/mainboard/sapphire/pureplatinumh61/Kconfig @@ -0,0 +1,68 @@ +if BOARD_SAPPHIRE_PUREPLATINUMH61 + +config BOARD_SPECIFIC_OPTIONS + def_bool y + select ARCH_X86 + select CPU_INTEL_SOCKET_LGA1155 + select NORTHBRIDGE_INTEL_IVYBRIDGE + select USE_NATIVE_RAMINIT + select SOUTHBRIDGE_INTEL_BD82X6X + select SUPERIO_FINTEK_F71808A + select BOARD_ROMSIZE_KB_4096 + select HAVE_ACPI_TABLES + select HAVE_OPTION_TABLE + select HAVE_CMOS_DEFAULT + select HAVE_ACPI_RESUME + select MAINBOARD_HAS_LIBGFXINIT + select INTEL_INT15 + select UDELAY_TSC + select SERIRQ_CONTINUOUS_MODE + +config HAVE_IFD_BIN + bool + default n + +config HAVE_ME_BIN + bool + default n + +config MAINBOARD_DIR + string + default sapphire/pureplatinumh61 + +config MAINBOARD_PART_NUMBER + string + default "Pure Platinum H61" + +config VGA_BIOS_FILE + string + default "pci8086,0162.rom" + +config VGA_BIOS_ID + string + default "8086,0162" + +config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID + hex + default 0x1007 + +config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID + hex + default 0x174b + +config MMCONF_BASE_ADDRESS + hex + default 0xf0000000 + +config DRAM_RESET_GATE_GPIO + int + default 60 + +config MAX_CPUS + int + default 8 + +config USBDEBUG_HCD_INDEX #USB port on the back under the Bluetooth module + int + default 4 +endif |