diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2021-11-07 10:23:36 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2022-04-09 02:50:01 +0000 |
| commit | 7a874330919a4df9cc5b66058b4340465b7ea041 (patch) | |
| tree | 7192d50705fde0142ccc3747e712d6641329edd1 /src/mainboard/samsung/stumpy | |
| parent | 5619ea2b982003b23bdeb48890981605a6201d67 (diff) | |
mb/google,samsung: Drop init_bootmode_straps()
Change-Id: Idcaf30c622bf5dc0f1295f2639c656086d01ff7e
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59008
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/mainboard/samsung/stumpy')
| -rw-r--r-- | src/mainboard/samsung/stumpy/chromeos.c | 35 | ||||
| -rw-r--r-- | src/mainboard/samsung/stumpy/early_init.c | 5 |
2 files changed, 2 insertions, 38 deletions
diff --git a/src/mainboard/samsung/stumpy/chromeos.c b/src/mainboard/samsung/stumpy/chromeos.c index 61782f8614..739b5775df 100644 --- a/src/mainboard/samsung/stumpy/chromeos.c +++ b/src/mainboard/samsung/stumpy/chromeos.c @@ -10,9 +10,6 @@ #include <vendorcode/google/chromeos/chromeos.h> #include "onboard.h" -#define FLAG_SPI_WP 0 -#define FLAG_REC_MODE 1 - void fill_lb_gpios(struct lb_gpios *gpios) { struct lb_gpio chromeos_gpios[] = { @@ -33,12 +30,12 @@ void fill_lb_gpios(struct lb_gpios *gpios) lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios)); } -static bool raw_write_protect_state(void) +int get_write_protect_state(void) { return get_gpio(GPIO_SPI_WP); } -static bool raw_recovery_mode_switch(void) +int get_recovery_mode_switch(void) { return !get_gpio(GPIO_REC_MODE); } @@ -50,34 +47,6 @@ int get_power_switch(void) return (gen_pmcon_1 >> 9) & 1; } -int get_write_protect_state(void) -{ - const pci_devfn_t dev = PCI_DEV(0, 0x1f, 2); - return (pci_s_read_config32(dev, SATA_SP) >> FLAG_SPI_WP) & 1; -} - -int get_recovery_mode_switch(void) -{ - const pci_devfn_t dev = PCI_DEV(0, 0x1f, 2); - return (pci_s_read_config32(dev, SATA_SP) >> FLAG_REC_MODE) & 1; -} - -void init_bootmode_straps(void) -{ - u32 flags = 0; - const pci_devfn_t dev = PCI_DEV(0, 0x1f, 2); - - /* Write Protect: GPIO68 = CHP3_SPI_WP, active high */ - if (raw_write_protect_state()) - flags |= (1 << FLAG_SPI_WP); - - /* Recovery: GPIO42 = CHP3_REC_MODE#, active low */ - if (raw_recovery_mode_switch()) - flags |= (1 << FLAG_REC_MODE); - - pci_s_write_config32(dev, SATA_SP, flags); -} - static const struct cros_gpio cros_gpios[] = { CROS_GPIO_REC_AL(GPIO_REC_MODE, CROS_GPIO_DEVICE_NAME), CROS_GPIO_WP_AH(GPIO_SPI_WP, CROS_GPIO_DEVICE_NAME), diff --git a/src/mainboard/samsung/stumpy/early_init.c b/src/mainboard/samsung/stumpy/early_init.c index dfb1f4d09b..97f656af4d 100644 --- a/src/mainboard/samsung/stumpy/early_init.c +++ b/src/mainboard/samsung/stumpy/early_init.c @@ -164,11 +164,6 @@ const struct southbridge_usb_port mainboard_usb_ports[] = { { 1, 0, 5 }, /* P13: Back port (OC5) */ }; -void mainboard_early_init(int s3resume) -{ - init_bootmode_straps(); -} - int mainboard_should_reset_usb(int s3resume) { if (s3resume) { |