diff options
author | Joel Linn <jl@conductive.de> | 2024-03-29 14:08:35 +0100 |
---|---|---|
committer | Nico Huber <nico.h@gmx.de> | 2024-04-13 13:22:58 +0000 |
commit | fb51661be11f4372f016b2c117114ceec574a2be (patch) | |
tree | d47f3c16b4e5af4581bc7f4c1ac5eec8cbeec598 /src/mainboard/samsung/stumpy/early_init.c | |
parent | 1a7ffa8521e0cee15a689176b29048e1c2bfcbcf (diff) |
superio/ite: Unify it8772f with common code
The it8772f is now configured by the much better common code that is
used for other chips in the family as well. This mainly concerns the EC,
the GPIO functionality was not moved to common as it currently lacks a
sane abstraction in any codebase.
The datasheets of the it8772e(f) and it8728f (for reference) were
studied and verified against the common code, adding exceptions where
needed.
Change-Id: Ic4d9d5460628e444dc20f620179b39c90dbc28c6
Signed-off-by: Joel Linn <jl@conductive.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81310
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Diffstat (limited to 'src/mainboard/samsung/stumpy/early_init.c')
-rw-r--r-- | src/mainboard/samsung/stumpy/early_init.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/src/mainboard/samsung/stumpy/early_init.c b/src/mainboard/samsung/stumpy/early_init.c index 681373c7d8..2719e337e2 100644 --- a/src/mainboard/samsung/stumpy/early_init.c +++ b/src/mainboard/samsung/stumpy/early_init.c @@ -12,9 +12,9 @@ #include <southbridge/intel/common/gpio.h> #include <superio/smsc/lpc47n207/lpc47n207.h> -#define SUPERIO_DEV PNP_DEV(0x2e, 0) #define SERIAL_DEV PNP_DEV(0x2e, IT8772F_SP1) -#define GPIO_DEV PNP_DEV(0x2e, IT8772F_GPIO) +#define GPIO_DEV PNP_DEV(0x2e, IT8772F_GPIO) +#define EC_DEV PNP_DEV(0x2e, IT8772F_EC) void mainboard_late_rcba_config(void) { @@ -58,17 +58,17 @@ static void setup_sio_gpios(void) * GPIO10 as USBPWRON12# * GPIO12 as USBPWRON13# */ - it8772f_gpio_setup(SUPERIO_DEV, 1, 0x05, 0x05, 0x00, 0x05, 0x05); + it8772f_gpio_setup(GPIO_DEV, 1, 0x05, 0x05, 0x00, 0x05, 0x05); /* * GPIO22 as wake SCI# */ - it8772f_gpio_setup(SUPERIO_DEV, 2, 0x04, 0x04, 0x00, 0x04, 0x04); + it8772f_gpio_setup(GPIO_DEV, 2, 0x04, 0x04, 0x00, 0x04, 0x04); /* * GPIO32 as EXTSMI# */ - it8772f_gpio_setup(SUPERIO_DEV, 3, 0x04, 0x04, 0x00, 0x04, 0x04); + it8772f_gpio_setup(GPIO_DEV, 3, 0x04, 0x04, 0x00, 0x04, 0x04); /* * GPIO45 as LED_POWER# @@ -82,8 +82,8 @@ static void setup_sio_gpios(void) * GPIO51 as USBPWRON8# * GPIO52 as USBPWRON1# */ - it8772f_gpio_setup(SUPERIO_DEV, 5, 0x06, 0x06, 0x00, 0x06, 0x06); - it8772f_gpio_setup(SUPERIO_DEV, 6, 0x00, 0x00, 0x00, 0x00, 0x00); + it8772f_gpio_setup(GPIO_DEV, 5, 0x06, 0x06, 0x00, 0x06, 0x06); + it8772f_gpio_setup(GPIO_DEV, 6, 0x00, 0x00, 0x00, 0x00, 0x00); } void mainboard_fill_pei_data(struct pei_data *pei_data) @@ -117,7 +117,7 @@ void bootblock_mainboard_early_init(void) setup_sio_gpios(); /* Early SuperIO setup */ - it8772f_ac_resume_southbridge(SUPERIO_DEV); + ite_ac_resume_southbridge(EC_DEV); ite_kill_watchdog(GPIO_DEV); ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); } |