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authorStefan Reinauer <reinauer@chromium.org>2012-04-30 14:57:51 -0700
committerStefan Reinauer <stefan.reinauer@coreboot.org>2012-05-01 19:27:34 +0200
commite6063fee5c954d5acd80fd51e11aeac31e83d13d (patch)
tree331b26df9de6e8b4e08473432de1d293602487df /src/mainboard/samsung/lumpy
parenta1155b47ca42ad1813c36e1d6de6e8116ae13845 (diff)
Fix Sandybridge/Ivybridge mainboards according to code review
This fixes a few cosmetics with the following three boards: - Intel Emerald Lake 2 - Samsung ChromeBook - Samsung ChromeBox The following issues were fixed: - rely on include path in ASL code instead of specifying relative paths - use updated ALIGN_CURRENT in acpi_tables.c - use preprocessor defines instead of hard coded values where possible Change-Id: Ia5941be3873aa84c30c13ff2f0428d1c52daa563 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/963 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard/samsung/lumpy')
-rw-r--r--src/mainboard/samsung/lumpy/acpi/superio.asl2
-rw-r--r--src/mainboard/samsung/lumpy/acpi_tables.c2
-rw-r--r--src/mainboard/samsung/lumpy/romstage.c18
3 files changed, 11 insertions, 11 deletions
diff --git a/src/mainboard/samsung/lumpy/acpi/superio.asl b/src/mainboard/samsung/lumpy/acpi/superio.asl
index 465fa54c91..01d94471c2 100644
--- a/src/mainboard/samsung/lumpy/acpi/superio.asl
+++ b/src/mainboard/samsung/lumpy/acpi/superio.asl
@@ -35,4 +35,4 @@
#define SIO_ENABLE_SMBX // pnp 2e.9: Enable Mailbox
#define SIO_SMBX_IO0 0xa00 // pnp 2e.9: io 0xa00
-#include "../../../../superio/smsc/mec1308/acpi/superio.asl"
+#include "superio/smsc/mec1308/acpi/superio.asl"
diff --git a/src/mainboard/samsung/lumpy/acpi_tables.c b/src/mainboard/samsung/lumpy/acpi_tables.c
index a9eeb74664..46fdf315ce 100644
--- a/src/mainboard/samsung/lumpy/acpi_tables.c
+++ b/src/mainboard/samsung/lumpy/acpi_tables.c
@@ -177,7 +177,7 @@ unsigned long acpi_fill_srat(unsigned long current)
void smm_setup_structures(void *gnvs, void *tcg, void *smi1);
-#define ALIGN_CURRENT current = ((current + 0x0f) & -0x10)
+#define ALIGN_CURRENT current = (ALIGN(current, 16))
unsigned long write_acpi_tables(unsigned long start)
{
unsigned long current;
diff --git a/src/mainboard/samsung/lumpy/romstage.c b/src/mainboard/samsung/lumpy/romstage.c
index 7aa4746948..82856f6b04 100644
--- a/src/mainboard/samsung/lumpy/romstage.c
+++ b/src/mainboard/samsung/lumpy/romstage.c
@@ -151,17 +151,17 @@ void main(unsigned long bist)
#endif
struct pei_data pei_data = {
- .mchbar = 0xfed10000,
- .dmibar = 0xfed18000,
- .epbar = 0xfed19000,
- .pciexbar = 0xf0000000,
- .smbusbar = 0x400,
+ .mchbar = DEFAULT_MCHBAR,
+ .dmibar = DEFAULT_DMIBAR,
+ .epbar = DEFAULT_EPBAR,
+ .pciexbar = CONFIG_MMCONF_BASE_ADDRESS,
+ .smbusbar = SMBUS_IO_BASE,
.wdbbar = 0x4000000,
.wdbsize = 0x1000,
- .hpet_address = 0xfed00000,
- .rcba = 0xfed1c000,
- .pmbase = 0x500,
- .gpiobase = 0x480,
+ .hpet_address = HPET_ADDR,
+ .rcba = DEFAULT_RCBABASE,
+ .pmbase = DEFAULT_PMBASE,
+ .gpiobase = DEFAULT_GPIOBASE,
.thermalbase = 0xfed08000,
.system_type = 0, // 0 Mobile, 1 Desktop/Server
.tseg_size = CONFIG_SMM_TSEG_SIZE,