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authorArthur Heymans <arthur@aheymans.xyz>2022-11-07 13:30:29 +0100
committerArthur Heymans <arthur@aheymans.xyz>2022-11-12 08:56:18 +0000
commit4c4bd3cd973f3ec20c3a343a183af4a19b97a748 (patch)
tree47978f6a48f60e28da38d881733162c665fd68fb /src/mainboard/purism
parentbd72bfece2da38ff60a99a3bbb15bd3243a5d647 (diff)
soc/intel/broadwell: Hook up PCI domain and CPU cluster ops to devicetree
Change-Id: I77a333827552741453d8b575f2a8009b3e1bf8f1 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69301 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/purism')
-rw-r--r--src/mainboard/purism/librem_bdw/devicetree.cb2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/purism/librem_bdw/devicetree.cb b/src/mainboard/purism/librem_bdw/devicetree.cb
index 60a06f47c2..ae98c9e79b 100644
--- a/src/mainboard/purism/librem_bdw/devicetree.cb
+++ b/src/mainboard/purism/librem_bdw/devicetree.cb
@@ -21,12 +21,14 @@ chip soc/intel/broadwell
}"
device cpu_cluster 0 on
+ ops broadwell_cpu_bus_ops
chip cpu/intel/haswell
device lapic 0 on end
device lapic 0xacac off end
end
end
device domain 0 on
+ ops broadwell_pci_domain_ops
device pci 00.0 on end # host bridge
device pci 02.0 on end # vga controller
device pci 03.0 on end # mini-hd audio