aboutsummaryrefslogtreecommitdiff
path: root/src/mainboard/purism/librem_cnl/Makefile.inc
diff options
context:
space:
mode:
authorMatt DeVillier <matt.devillier@puri.sm>2020-10-29 20:30:08 -0500
committerAngel Pons <th3fanbus@gmail.com>2020-11-03 19:01:40 +0000
commit54e0fd21b1f916a3f152114027db1029a921fc55 (patch)
treee4e664bda3f493201533ec1a71e7d623ab7ea725 /src/mainboard/purism/librem_cnl/Makefile.inc
parent2c707160a92ebb36577b886db6dc9a5ac8770163 (diff)
mb/purism/librem_whl: rename to librem_cnl
Since Whiskeylake SoC code is actually a subset of soc/intel/cannonlake, rename the baseboard so that boards using other 'cannonlake family' SoCs (e.g., Cometlake) can be added with minimal confusion. Rename the mainboard dir and baseboard name, and adjust any references to them. Change-Id: I2af7977f1622070eb8bf8449bc8306f9d75b9851 Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47050 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/purism/librem_cnl/Makefile.inc')
-rw-r--r--src/mainboard/purism/librem_cnl/Makefile.inc7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/mainboard/purism/librem_cnl/Makefile.inc b/src/mainboard/purism/librem_cnl/Makefile.inc
new file mode 100644
index 0000000000..ba157dfd05
--- /dev/null
+++ b/src/mainboard/purism/librem_cnl/Makefile.inc
@@ -0,0 +1,7 @@
+## SPDX-License-Identifier: GPL-2.0-only
+
+ramstage-y += variants/$(VARIANT_DIR)/gpio.c
+ramstage-y += variants/$(VARIANT_DIR)/hda_verb.c
+ramstage-y += ramstage.c
+
+CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/include