diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2021-06-23 15:50:13 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2022-08-14 10:53:47 +0000 |
| commit | 29e71b1291bd22366d75b4dc3c897b355ff268ce (patch) | |
| tree | 21fe08ac0057cdbf839b0f8a2f9d440e834c6900 /src/mainboard/purism/librem_bdw/variants | |
| parent | 2a90e396fc1b0d008024cff1a1b02ee8f1cd0036 (diff) | |
broadwell: Move some MRC/refcode settings to devicetree
There's no generic way to tell whether a mainboard has an EC or not.
Making Kconfig symbols for these options seems overkill, too. So, just
put them on the devicetree. Also, drop unnecessary assignments when the
board's current value is zero, as the struct defaults to zero already.
Change-Id: I8d3b352333bea7ea6f7b0f96d73e6c2d7d1a2cfb
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55809
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Diffstat (limited to 'src/mainboard/purism/librem_bdw/variants')
3 files changed, 2 insertions, 6 deletions
diff --git a/src/mainboard/purism/librem_bdw/variants/librem13v1/pei_data.c b/src/mainboard/purism/librem_bdw/variants/librem13v1/pei_data.c index 0025617146..04fb9ea9e1 100644 --- a/src/mainboard/purism/librem_bdw/variants/librem13v1/pei_data.c +++ b/src/mainboard/purism/librem_bdw/variants/librem13v1/pei_data.c @@ -11,8 +11,6 @@ void mainboard_fill_spd_data(struct pei_data *pei_data) void mainboard_fill_pei_data(struct pei_data *pei_data) { - pei_data->ec_present = 1; - /* P1: Left Side Port (USB2 only) */ pei_data_usb2_port(pei_data, 0, 0x0080, 1, USB_OC_PIN_SKIP, USB_PORT_BACK_PANEL); /* P2: Right Side Port (USB2) */ diff --git a/src/mainboard/purism/librem_bdw/variants/librem15v2/overridetree.cb b/src/mainboard/purism/librem_bdw/variants/librem15v2/overridetree.cb index d88c19c26a..76737cc5e2 100644 --- a/src/mainboard/purism/librem_bdw/variants/librem15v2/overridetree.cb +++ b/src/mainboard/purism/librem_bdw/variants/librem15v2/overridetree.cb @@ -1,5 +1,7 @@ chip soc/intel/broadwell + register "dq_pins_interleaved" = "true" + device domain 0 on chip soc/intel/broadwell/pch # Port 0 is HDD diff --git a/src/mainboard/purism/librem_bdw/variants/librem15v2/pei_data.c b/src/mainboard/purism/librem_bdw/variants/librem15v2/pei_data.c index 1cb7e756e7..209cf30248 100644 --- a/src/mainboard/purism/librem_bdw/variants/librem15v2/pei_data.c +++ b/src/mainboard/purism/librem_bdw/variants/librem15v2/pei_data.c @@ -5,8 +5,6 @@ void mainboard_fill_spd_data(struct pei_data *pei_data) { - pei_data->dq_pins_interleaved = 1; - /* One DIMM slot */ pei_data->spd_addresses[0] = 0xa0; pei_data->spd_addresses[2] = 0xa4; @@ -14,8 +12,6 @@ void mainboard_fill_spd_data(struct pei_data *pei_data) void mainboard_fill_pei_data(struct pei_data *pei_data) { - pei_data->ec_present = 1; - /* P1: Right Side Port (USB2) */ pei_data_usb2_port(pei_data, 0, 0x0080, 1, USB_OC_PIN_SKIP, USB_PORT_BACK_PANEL); /* P2: Right Side Port (USB2) */ |