diff options
author | Duncan Laurie <dlaurie@google.com> | 2015-12-22 17:27:02 -0800 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2016-01-22 19:13:14 +0100 |
commit | 27807c66ee5d73c54de942b56359e447d27b1477 (patch) | |
tree | a269a1de89d3eca2745c36525c8657f58d2dcb0c /src/mainboard/purism/librem13/romstage.c | |
parent | 420b2a513e48e7e9416a93dd7681c57328942708 (diff) |
purism/librem13: Add support for Purism Librem 13 mainboard
This adds support for booting the Purism Librem 13 mainboard
with coreboot, using binaries extracted from the original BIOS
and from a Broadwell Chromebook.
The following features have been tested on Ubuntu 15.10:
- Input: Keyboard and Trackpad
- SATA: Internal HDD and M.2 NGFF
- Network: WiFi and Ethernet
- USB: Bluetooth, Camera, SD Card, Ports (1xUSB2 and 1xUSB3)
- Video: Internal panel and HDMI port
- Internal speakers and microphone (headphones do not work)
- EC handling for battery, AC, lid, special keys
These binaries are extracted from the original BIOS:
- VGA BIOS
- Management Engine
- Intel Firmware Descriptor
These binaries are extracted from a Broadwell Chromebook BIOS:
- MemoryInit reference code binary
- SiliconInit reference code binary
This was developed and tested on an Librem 13 device. For those
who may want to do more development you can use EHCI debug and the
right USB port to get coreboot output.
Change-Id: Ia72e2d7ddc8ba5eef63819e5677122a5a5c705d8
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://review.coreboot.org/13026
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard/purism/librem13/romstage.c')
-rw-r--r-- | src/mainboard/purism/librem13/romstage.c | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/src/mainboard/purism/librem13/romstage.c b/src/mainboard/purism/librem13/romstage.c new file mode 100644 index 0000000000..2e0ae85b95 --- /dev/null +++ b/src/mainboard/purism/librem13/romstage.c @@ -0,0 +1,37 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2016 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <string.h> +#include <soc/gpio.h> +#include <soc/pei_data.h> +#include <soc/pei_wrapper.h> +#include <soc/romstage.h> +#include "gpio.h" + +void mainboard_romstage_entry(struct romstage_params *rp) +{ + struct pei_data pei_data; + + /* Initialize GPIOs */ + init_gpios(mainboard_gpio_config); + + /* Fill out PEI DATA */ + memset(&pei_data, 0, sizeof(pei_data)); + mainboard_fill_pei_data(&pei_data); + rp->pei_data = &pei_data; + + /* Initialize memory */ + romstage_common(rp); +} |