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authorFelix Singer <felixsinger@posteo.net>2024-06-23 04:37:30 +0200
committerFelix Singer <felixsinger@posteo.net>2024-06-24 14:23:34 +0000
commitba7569c10b2aa37083242d8969edc5241cabaffa (patch)
treef963cffe79b0340dbc6a031608d4d293e1174ce9 /src/mainboard/protectli/vault_kbl
parent00e137694367a0db3606b3c6a887f49356e2a440 (diff)
skl mainboards/dt: Drop SataPortsDevSlp[x] setting if disabled
The attributes are initialized with 0 and thus setting them to 0 makes them superfluous. Remove them. Change-Id: I572a9092633c61907794ecbbbe431066d889c5fb Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83177 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/protectli/vault_kbl')
-rw-r--r--src/mainboard/protectli/vault_kbl/devicetree.cb2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/mainboard/protectli/vault_kbl/devicetree.cb b/src/mainboard/protectli/vault_kbl/devicetree.cb
index b824fb4b1b..f57f97832c 100644
--- a/src/mainboard/protectli/vault_kbl/devicetree.cb
+++ b/src/mainboard/protectli/vault_kbl/devicetree.cb
@@ -109,8 +109,6 @@ chip soc/intel/skylake
# Enable SATA ports 1,2
register "SataPortsEnable[0]" = "1"
register "SataPortsEnable[1]" = "1"
- register "SataPortsDevSlp[0]" = "0"
- register "SataPortsDevSlp[1]" = "0"
# Enable Root ports. 1-6 for LAN and Root Port 9
register "PcieRpEnable[0]" = "1"