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| author | Felix Held <felix-coreboot@felixheld.de> | 2023-07-18 20:38:01 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-07-25 13:33:43 +0000 |
| commit | c1be66ee6003701106e27b7e43e8bbfc934f4c39 (patch) | |
| tree | 2f67cbf4acaa33c08f2aa41ee0cc505ac9f275ea /src/mainboard/protectli/vault_ehl | |
| parent | e0850ad6a01fc4af730bac3d5fdb59e347af4cff (diff) | |
soc/amd/glinda/root_complex: add non-PCI MMIO registers
Add the SoC-specific non-PCI MMIO register list. PPR #57254 Rev 1.52 was
used as a reference.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I29b4ef947776ab8a6c215c1a5204769a9f61e6fe
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76598
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/mainboard/protectli/vault_ehl')
0 files changed, 0 insertions, 0 deletions