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author | Felix Held <felix-coreboot@felixheld.de> | 2024-08-07 16:53:25 +0200 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2024-08-09 22:22:18 +0000 |
commit | 5eebeaf31cbe30b11275aa5d80a341274f680cfc (patch) | |
tree | fadd12fa36b3c874ff7dd2435e14cd2d9d56277a /src/mainboard/protectli/vault_bsw | |
parent | 0bdee9ca68ca49f5d028bf273cecbfa5d9c5fa45 (diff) |
soc/amd/*: pass PSP RPMC NVRAM base and size to amdfwtool
Pass the PSP NVRAM base and size to amdfwtool for all SoCs except Genoa
and Stoneyridge which don't use/support this.
If a mainboard has an section named 'PSP_RPMC_NVRAM' in its FMAP file,
the start and length of it in the flash will be passed to amdfwtool
which then adds the base and length to the corresponding type 0x54 PSP
directory table entry.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Id9f8a7eec68a5222be63e46173132f1c4a461b4f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83815
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Diffstat (limited to 'src/mainboard/protectli/vault_bsw')
0 files changed, 0 insertions, 0 deletions