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author | Felix Held <felix-coreboot@felixheld.de> | 2023-07-20 20:43:41 +0200 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2023-07-25 13:34:12 +0000 |
commit | b8b0c66cffe1edaf2ddff66c17943d0f5d774330 (patch) | |
tree | 159bb926e0dc30e85b7e10936e910ef6d3a8407e /src/mainboard/protectli/vault_bsw/onboard.h | |
parent | 32169720bb6756faba38148d2425c0a85df117c1 (diff) |
soc/amd/common/acpi/ivrs: probe IOAPIC device on domain device
This reverts commit e33d253793f6 ("soc/amd/common/block/acpi/ivrs: fix
missing IOAPIC[1] error").
Now that the per PCI root domain IOAPIC MMIO resource is reported on the
domain device, we can again probe the resource on the domain device
instead of the northbridge PCI device in that domain. This will make the
IVRS code compatible again with the work in progress Genoa SoC support.
TEST=Linux doesn't complain about the IOAPIC[1] missing in the IVRS on
Mandolin.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ib861b19d798fc8ee6603e8803d8d1939be08d275
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76659
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Diffstat (limited to 'src/mainboard/protectli/vault_bsw/onboard.h')
0 files changed, 0 insertions, 0 deletions