diff options
author | Lean Sheng Tan <sheng.tan@9elements.com> | 2022-01-07 13:48:13 +0100 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2022-01-12 16:19:30 +0000 |
commit | 5352d223783ea2b178412839a3ff57070733c554 (patch) | |
tree | 2f045f00f9d351d31b12ab43a2fe43e5912576bb /src/mainboard/prodrive/atlas/dsdt.asl | |
parent | 2853f0fd63dff2fb7e7eb03ccb5a73d3ff04255c (diff) |
mb/prodrive/atlas: Add new mainboard based on adlrvp
This is a initial mainboard code cloned from adlrvp aimed to serve as
base for further mainboard check-ins. This commit copies the mainboard
directory and adjusts the naming to match the new board's name.
Besides, This commit also trims down major parts of adlrvp code except
some of ADL-P DDR5 RVP as Atlas is using it as main reference.
Follow-up commits will introduce the needed changes for the new
mainboard.
Signed-off-by: Lean Sheng Tan <sheng.tan@9elements.com>
Change-Id: Ia3129f68c73969604edcd290c3e50ad219cf88d9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60899
Reviewed-by: Christian Walter <christian.walter@9elements.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/prodrive/atlas/dsdt.asl')
-rw-r--r-- | src/mainboard/prodrive/atlas/dsdt.asl | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/src/mainboard/prodrive/atlas/dsdt.asl b/src/mainboard/prodrive/atlas/dsdt.asl new file mode 100644 index 0000000000..d39f2ef211 --- /dev/null +++ b/src/mainboard/prodrive/atlas/dsdt.asl @@ -0,0 +1,29 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <acpi/acpi.h> + +DefinitionBlock( + "dsdt.aml", + "DSDT", + ACPI_DSDT_REV_2, + OEM_ID, + ACPI_TABLE_CREATOR, + 0x20110725 /* OEM revision */ +) +{ + #include <acpi/dsdt_top.asl> + #include <soc/intel/common/block/acpi/acpi/platform.asl> + + /* global NVS and variables */ + #include <soc/intel/common/block/acpi/acpi/globalnvs.asl> + + #include <cpu/intel/common/acpi/cpu.asl> + + Device (\_SB.PCI0) { + #include <soc/intel/common/block/acpi/acpi/northbridge.asl> + #include <soc/intel/alderlake/acpi/southbridge.asl> + #include <soc/intel/alderlake/acpi/tcss.asl> + } + + #include <southbridge/intel/common/acpi/sleepstates.asl> +} |