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authorHarsha B R <harsha.b.r@intel.com>2023-02-07 16:22:11 +0530
committerSridhar Siricilla <sridhar.siricilla@intel.com>2023-02-08 17:04:06 +0000
commit663efbb0f74aa375e9c96a7ac433082d3a4f6f43 (patch)
tree0a87f7209f436261d747723fa12b5027b8d011c4 /src/mainboard/portwell
parent978b47463e534c2b8325ebd9c86464555d96d4b6 (diff)
mb/intel/mtlrvp: Enable PCIE Advanced Error Reporting
This patch enables PCI Express Advanced Error Reporting Capability for WWAN, WLAN, and SSD root ports. On enabling PCIE_RP_AER, PCIE device will automatically report (if any error) about the error nature to the corresponding PCIe root port. BUG=b:224325352 BRANCH=None TEST=Build and boot mtlrvp to ChromeOS. Signed-off-by: Harsha B R <harsha.b.r@intel.com> Change-Id: Iab8619818e2219b41287b895513eb04b0464401e Reviewed-on: https://review.coreboot.org/c/coreboot/+/72874 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Jamie Ryu <jamie.m.ryu@intel.com> Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
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